Top 1201 Asic Design Engineer Jobs

Senior ASIC Digital Design Engineer
General Dynamics Mission Systems, Inc —Annapolis Junction, MD
- $142,166 - $150,000 a year
- Full-time
- Hybrid work
- Computer Science
- 3 years
- Master's degree
Physical Design Engineer
iTechStack Inc. —Mountain View, CA
- $110,000 - $150,000 a year
- Full-time
- Mid-level
- Master's degree
- In-person
- Health insurance
- Dental insurance
Quick Apply
ASIC & FPGA Design Engineer
People Integra LLC. —Grand Prairie, TX
- $50.00 - $88.99 an hour
- Full-time
- Hybrid work
- Background check
- Laboratory experience
- 3 years
Quick Apply
6h
Advanced ASIC FPGA Design Engineer for Crypto and Cross Domain Solutions
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $135,396 - $150,205 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
Lead ASIC Digital Design Engineer
General Dynamics Mission Systems, Inc —Annapolis Junction, MD
- $176,512 - $187,000 a year
- Full-time
- Hybrid work
- 5 years
- Master's degree
- Analysis skills
Jr. ASIC Design Engineer
Fermilab —Batavia, IL
- $70,800 - $93,200 a year
- Full-time
- Hybrid work
- Background check
- Engineering
- Pass drug screening
- Disability insurance
- Health insurance
ASIC Digital Design, Staff Engineer
Synopsys —Austin, TX
- $114,000 - $170,000 a year
- Master's degree
- Analysis skills
- Continuous improvement
ASIC Digital Design, Principal Engineer
Synopsys —Austin, TX
- $166,000 - $249,000 a year
- Analysis skills
- Continuous improvement
- Mentoring
ASIC Design Engineer - Fabric/Interconnect
Apple —Austin, TX
- $150,400 - $277,600 a year
- Bachelor of Science
- Mid-level
- 3 years
- Employee stock purchase plan
- Health insurance
ASIC Engineer, Design Verification
Meta —Austin, TX
- $114,000 - $172,000 a year
- Computer science
- Computer Science
- Mid-level
13d
ASIC Digital Design Engineer
General Dynamics Mission Systems, Inc —Annapolis Junction, MD
- $114,489 - $120,750 a year
- Full-time
- Hybrid work
- Mid-level
- Master's degree
- Continuous improvement
ASIC Design Engineer
NVIDIA —Santa Clara, CA
- $116,000 - $218,500 a year
- Full-time
- Computer science
- Computer Science
- Bachelor of Science
ASIC Design Engineer
Blue Origin —Central, TX
- Full-time
- Background check
- Bachelor of Science
- DOT physical examination
- Paid parental leave
- Paid holidays
ASIC Design and Integration Engineer
Apple —Beaverton, OR
- $184,700 - $324,800 a year
- Bachelor of Science
- 8 years
- Analysis skills
- Employee stock purchase plan
- Health insurance
Senior ASIC Floorplan Design Engineer
NVIDIA —Austin, TX
- $196,000 - $310,500 a year
- Full-time
- Computer science
- Computer Science
- CAD
ASIC Design Engineer
Qualcomm —Santa Clara, CA
- $126,700 - $190,100 a year
- 5 years
- Engineering
- Analysis skills
ASIC Design Engineer - Hardware
NVIDIA —Austin, TX
- $116,000 - $218,500 a year
- Full-time
- Hybrid work
- Bachelor of Science
- Mid-level
- Analysis skills
ASIC Design Engineer
Broadcom —Irvine, CA
- $108,000 - $172,800 a year
- Full-time
- 6 years
- Master's degree
- Fair chance
- Employee stock purchase plan
- Paid holidays
ASIC Clocks Design Engineer - New College Grad 2026
NVIDIA —Austin, TX
- $100,000 - $189,750 a year
- Full-time
- Mid-level
- Electrical Engineering
ASIC Design Verification Engineer (Santa Clara, CA)
Qualcomm —Austin, TX
- $126,700 - $190,100 a year
- Engineering
- Mid-level
- 3 years

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Senior ASIC Digital Design Engineer

General Dynamics Mission Systems, Inc -
Annapolis Junction, MD

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Job Details

Full-time
$142,166 - $150,000 a year

Qualifications

AI use case identification
Systems integration
Computer Science
Bachelor's degree in electrical engineering
Verification (System development task)
Team leadership
FPGA
AI integration
Engineering process optimization
VHDL
3 years
Master's degree
Verilog
System design for system development
Collaboration with product development teams
Analysis skills
Bachelor's degree in engineering
Continuous improvement
Design development
Mentoring
Design engineering
Computer Engineering
Security systems
Leading team collaboration initiatives
Engineering product development
System development
FPGA circuit design
Bachelor's degree in mathematics
Senior level
Electrical Engineering

Full Job Description

Basic Qualifications :

Education Requirements:

Requires a Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience.

Clearance Requirements:

Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Responsibilities for this Position:

Knowledge, Skills and Abilities:

What You’ll Get to Do:

Lead a team of digital design engineers to create a security system on a chip.
Collaborate with team members and across teams to explore and clearly identify real problems and solutions.
Develop and define the microarchitecture of new IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions.
Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages.
Integrate complex systems that instantiate both the organization's and third party IP.
Contribute to all aspects of design success from specification to production.
Apply our state-of-the-art IP to ASIC and FPGA products in the real world.
Define and improve high-quality design methods and processes.
Mentor and guide other ASIC design engineers.
Identifies opportunities to apply AI for continuous improvement and innovation.

Knowledge, Skills and Abilities:

Solid technical background with at least 5 years of experience in FPGA or ASIC product development
Team leadership experience.
Ability to communicate clearly in person and in written documentation
Degree in Computer Engineering, Computer Science, Electrical Engineering or related field
In-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verification
Strong analytical and problem solving skills
Extreme attention to detail
A willingness to roll up one’s sleeves to get the job done
Skilled at working effectively with cross functional teams

#LI-Hybrid

Salary Note: This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled. Combined Salary Range: USD $142,166.00 - USD $150,000.00 /Yr. Company Overview:

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

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ASIC Design Verification Engineer (Santa Clara, CA)

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