Top 1560 Asic Engineer Jobs

Advanced FPGA & ASIC Engineer with strong RTL (Verilog/SystemVerilog)
Revolution Technologies, LLC —Minneapolis, MN
- $82 - $90 an hour
- Contract
- Background check
- Master's degree
- Analysis skills
- Health insurance
- Dental insurance
Quick Apply
ASIC Floorplan Design Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $100,000 - $189,750 a year
- Full-time
- Computer science
- Computer Science
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ASIC DFT Engineer
Cisco Systems —San Jose, CA
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- 5 years
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- US work authorization
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ASIC Verification Engineer
NVIDIA —Santa Clara, CA
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ASIC Clocks Verification Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $116,000 - $218,500 a year
- Full-time
- Hybrid work
- Mid-level
- Master's degree
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ASIC Design Engineer
NVIDIA —Santa Clara, CA
- $116,000 - $218,500 a year
- Full-time
- Computer science
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- Bachelor of Science
ASIC Verification Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $100,000 - $189,750 a year
- Full-time
- Computer science
- Computer Science
- Bachelor of Science
13d
ASIC Design Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $100,000 - $189,750 a year
- Full-time
- Computer science
- Computer Science
- Basic math
11d
ASIC Clocks Design Engineer - New College Grad 2026
NVIDIA —Austin, TX
- $100,000 - $189,750 a year
- Full-time
- Mid-level
- Electrical Engineering
ASIC Verification Engineer - GPU
NVIDIA —Santa Clara, CA
- $136,000 - $264,500 a year
- Full-time
- Mid-level
- Analysis skills
- Electrical Engineering
Low Power ASIC Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $100,000 - $189,750 a year
- Full-time
- Bachelor of Science
- Doctor of Philosophy
- Electrical Engineering
ASIC DFT STA Engineer
Cisco Systems —San Jose, CA
- $146,700 - $277,600 a year
- Full-time
- Master's degree
- Analysis skills
- Bachelor's degree
- Paid parental leave
- Paid holidays
SOC Design Engineer, ASIC Tools and Methodology Development
NVIDIA —Austin, TX
- $116,000 - $218,500 a year
- Full-time
- Hybrid work
- DevOps
- Mid-level
- Master's degree
ASIC Physical Design Engineer, Netlisting - New College Grad 2026
NVIDIA —Austin, TX
- $116,000 - $218,500 a year
- Full-time
- Mid-level
- Doctor of Philosophy
- Experience equivalent to degree accepted
Jr. ASIC Design Engineer
Fermilab —Batavia, IL
- $70,800 - $93,200 a year
- Full-time
- Hybrid work
- Background check
- Engineering
- Pass drug screening
- Disability insurance
- Health insurance
ASIC Design Efficiency Engineer
NVIDIA —Austin, TX
- $116,000 - $218,500 a year
- Full-time
- System design
- Mid-level
- Experience equivalent to degree accepted
ASIC Design Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)
ByteDance —San Jose, CA
- $122,574 - $256,000 a year
- Multiple hires
- Computer Science
- Bachelor of Science
- Master's degree
- Paid parental leave
- Paid holidays
ASIC Design Verification Engineer
Cisco Systems —San Jose, CA
- $146,700 - $277,600 a year
- Full-time
- Master's degree
- Bachelor's degree
- Doctor of Philosophy
- Paid parental leave
- Paid holidays
Senior ASIC Floorplan Design Engineer
NVIDIA —Austin, TX
- $196,000 - $310,500 a year
- Full-time
- Computer science
- Computer Science
- CAD
Senior ASIC Verification Engineer
NVIDIA —Santa Clara, CA
- $168,000 - $310,500 a year
- Full-time
- Hybrid work
- 6 years
- Computer Science
- Analysis skills

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Advanced FPGA & ASIC Engineer with strong RTL (Verilog/SystemVerilog)

Revolution Technologies, LLC
Minneapolis, MN

Quick Apply

Job Details

Contract
$82 - $90 an hour

Benefits

Health insurance
Dental insurance
Vision insurance

Qualifications

Analog circuit design
FPGA
Verilog
Digital circuit design
Design engineering
Simulation tools
FPGA circuit design
Debugging

Full Job Description

We are hiring an Advanced FPGA & ASIC Engineer with strong RTL (Verilog/SystemVerilog) experience to support high-performance hardware development.

About the Company

Our client is a leading provider of advanced engineering solutions supporting mission-critical programs across defense, aerospace, and high-performance computing environments. Their teams focus on developing cutting-edge hardware and integrated systems for complex, high-reliability applications.

The organization is known for delivering challenging, hands-on engineering work and partnering with top-tier technical teams across the full system lifecycle.

About the Role

This is a 12-month contract with strong potential for extension.

Responsibilities

Design, develop, and verify both FPGA and ASIC solutions
Define architecture and requirements
Perform RTL design and simulation (Verilog/SystemVerilog)
Execute synthesis, place & route, and timing analysis
Support system integration, validation, and testing
Support FPGA prototyping and hardware validation of ASIC designs
Develop and execute simulation and test plans
Collaborate across hardware, software, and systems engineering teams
Evaluate performance, power, and scalability tradeoffs
Contribute to continuous improvement of design methodologies and processes

Qualifications

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s preferred)
Hands-on experience in BOTH FPGA and ASIC design across the full development lifecycle

Required Skills

Strong expertise in:
RTL design (Verilog/SystemVerilog)
FPGA development and debugging
ASIC design flows (e.g., synthesis, timing, validation)
Experience with tools such as Vivado, QuestaSim, or similar
Solid understanding of digital design, timing analysis, and hardware optimization
Experience working in hardware-centric environments (not software-only roles)

Preferred Skills

ASIC tapeout or silicon validation
FPGA prototyping to support ASIC development
High-speed interfaces (SERDES, SPI, I2C, AXI)
Background in defense, aerospace, or high-reliability systems
Experience working in cross-functional engineering teams

Duration: 12-month contract (likely extension)

Schedule: Full-time, onsite

Start: ASAP

If you have strong experience in both FPGA and ASIC design and enjoy solving complex hardware challenges across the full development lifecycle, we encourage you to apply.

Key Skills:

FPGA
ASIC
RTL Design
Verilog
SystemVerilog
Digital Design
Hardware Engineering
FPGA Development
ASIC Design
VHDL (optional but helpful)
Embedded Systems

Pay: $82.00 - $90.00 per hour

Benefits:

Dental insurance
Health insurance
Vision insurance

Work Location: In person

Quick Apply

Refine Your Search

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Advanced FPGA & ASIC Engineer with strong RTL (Verilog/SystemVerilog)

ASIC Floorplan Design Engineer - New College Grad 2026

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ASIC Verification Engineer

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ASIC Verification Engineer - New College Grad 2026

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ASIC Clocks Design Engineer - New College Grad 2026

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ASIC DFT STA Engineer

SOC Design Engineer, ASIC Tools and Methodology Development

ASIC Physical Design Engineer, Netlisting - New College Grad 2026

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ASIC Design Efficiency Engineer

ASIC Design Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)

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Senior ASIC Floorplan Design Engineer

Senior ASIC Verification Engineer

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