Top 1043 Asic Verification Jobs

FPGA/ASIC Verification Engineer
Grammar LLC —Rochester, NY
- $90,500 - $197,500 a year
- 8 hour shift
- Java
- Bachelor's degree
- Linux
- Paid holidays
- Disability insurance
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Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $135,396 - $150,205 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
Senior Electrical Engineer - ASIC/FPGA Verification (Onsite)
Collins Aerospace —Cedar Rapids, IA
- $86,800 - $165,200 a year
- Full-time
- 3 years
- Scripting
- In-person
- Paid holidays
- Loan repayment program
ASIC Verification Engineer - New College Grad 2026
NVIDIA —Austin, TX
- $100,000 - $189,750 a year
- Full-time
- Computer science
- Computer Science
- Bachelor of Science
ASIC Clocks Verification Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $116,000 - $218,500 a year
- Full-time
- Hybrid work
- Mid-level
- Master's degree
- Experience equivalent to degree accepted
ASIC Verification Engineer - GPU
NVIDIA —Santa Clara, CA
- $136,000 - $264,500 a year
- Full-time
- Mid-level
- Analysis skills
- Electrical Engineering
Senior ASIC/FPGA Verification Engineer (Onsite)
Collins Aerospace —El Segundo, CA
- $95,500 - $181,700 a year
- Full-time
- Office
- 3 years
- Mentoring
- Paid holidays
- Loan repayment program
ASIC Verification Engineer
NVIDIA —Santa Clara, CA
- $116,000 - $218,500 a year
- Full-time
- Computer science
- Computer Science
- Research
Senior ASIC Verification Engineer
NVIDIA —Santa Clara, CA
- $168,000 - $310,500 a year
- Full-time
- Hybrid work
- 6 years
- Computer Science
- Analysis skills
Principal ASIC Design Verification Engineer - Terawave
Blue Origin —Central, TX
- $269,175.00 - $376,843.95 a year
- Full-time
- Background check
- Bachelor of Science
- DOT physical examination
- Paid parental leave
- Paid holidays
Cell Modeling and Verification Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $100,000 - $189,750 a year
- Full-time
- Mid-level
- Master's degree
- Electrical Engineering
ASIC Design Verification Engineer (Santa Clara, CA)
Qualcomm —Austin, TX
- $126,700 - $190,100 a year
- Engineering
- Mid-level
- 3 years
ASIC/FPGA Senior Verification Engineer - Milwaukee, WI or Mayfield Heights, OH
Info-Ways —Milwaukee, WI
- Contract
- 5 years
- English
- Analysis skills
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ASIC Verification Engineer
Capgemini —Seattle, WA
- $76,200 - $187,740 a year
- Full-time
- Remote
- 5 years
- Senior level
- Communication skills
- Paid holidays
- Disability insurance
Senior ASIC Design Verification Engineer
NVIDIA —Santa Clara, CA
- $136,000 - $218,500 a year
- Full-time
- Hybrid work
- 3 years
- Analysis skills
- Continuous improvement
FPGA Design Manager / Section Lead
BAE Systems Inc. —Totowa, NJ
- $153,377 - $260,743 a year
- Full-time
- Hybrid work
- Microsoft Word
- Computer Science
- Master's degree
- Health savings account
- Paid holidays
Advanced ASIC FPGA Design Engineer for Crypto and Cross Domain Solutions
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $135,396 - $150,205 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
Lead ASIC DFT Engineer
Cyient —San Jose, CA
- $80 - $85 an hour
- Full-time
- Analysis skills
- Mentoring
- In-person
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Senior Principal ASIC FPGA Engineer
General Dynamics Mission Systems, Inc —Boise, ID
- $191,146 - $212,053 a year
- Full-time
- Hybrid work
- Research
- Master's degree
- 8 years
Senior ASIC Digital Design Engineer
General Dynamics Mission Systems, Inc —Annapolis Junction, MD
- $142,166 - $150,000 a year
- Full-time
- Hybrid work
- Computer Science
- 3 years
- Master's degree

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FPGA/ASIC Verification Engineer

Grammar LLC -
Rochester, NY

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Job Details

Full-time
$90,500 - $197,500 a year

Benefits

Paid holidays
Disability insurance
Health insurance
Flexible spending account
Paid time off
Parental leave
Employee assistance program
401(k) matching
Flexible schedule

Qualifications

Embedded systems
FPGA
FPGA circuit design

Full Job Description

Role: FPGA/ASIC Verification Engineer

Job Schedule: 9/80: Employees work 9 out of every 14 days – totaling 80 hours worked – and have every other Friday off OR 5/8: Employees work 8 hours per day, 5 days a week

Job Description:

Join our team at the company and play a critical role in developing secure, cutting-edge tactical communication systems that protect those who protect us. As an FPGA Verification Engineer, you’ll collaborate with a talented, mission-driven team, verifying next-generation FPGA solutions for our radios used by military and first responders worldwide. This is a hands-on opportunity to grow your expertise in UVM, advanced verification methodologies, and complex communication systems—while enjoying work-life balance with flexible schedules and every other Friday off.

You will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. We're seeking familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard interfaces. You will be required to analyze requirements, create test specifications/plans, write tests in System Verilog within a UVM test bench framework, and verify designs meet requirements. You will work with cross functional teams to verify FPGA designs for radio product development projects.

Essential Functions:

Perform FPGA design verification and validation of embedded electronic communication.

Assist in development of high-level and detailed verification test plans consistent with system requirements and specifications.

Develop self-checking test benches for FPGA design verification and validation using System Verilog.

Develop Agents, Test sequences, Cover groups, Predictors, Scoreboards.

Develop randomized and directed tests to achieve closure on functional coverage and provide feedback to team to reach functional coverage goals.

Develop high-level and detailed verification test plans and test benches consistent with system requirements and specifications.

Work with cross functional teams as needed to define and verify product and design requirements.

Prepare design and implementation reviews. Present technical briefings and status to internal and external customers.

Ability to obtain and maintain US Security Clearance.

Qualifications:

Bachelor’s Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience.

Experience developing and verifying FPGA/ASIC based embedded system solutions.

Preferred Additional Skills:

Demonstrated ability to analyze and debug FPGA firmware and related hardware issues.

Working knowledge of Ethernet Standard and design experience related to Ethernet packet processing.

Experience with cryptographic algorithms and cryptographic solutions for embedded communication systems.

Experience with Mentor Graphics Verification tools.

FPGA/ASIC RTL Design experience.

Proficiency in Object Oriented Programming (C++, JAVA).

Proven proficiency in FPGA/ASIC verification using System Verilog.

Working knowledge of UVM/OVM methodology.

Experience with Advanced Functional Verification tools to report functional coverage.

Experience with scripting languages (Bash, Perl, Python, Tcl).

Familiarity in working within Linux OS.

Familiarity with industry standard interfaces (Ethernet, AXI, SPI).

Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.

Highly motivated, self-starter, who works well in team environments.

In compliance with pay transparency requirements, the salary range for this role in New York State is $90,500-$168,500. The salary range for this role in Maryland is $106,500 - $197,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. Our company also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.

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Refine Your Search

Asic Verification jobs

FPGA/ASIC Verification Engineer

Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions

Senior Electrical Engineer - ASIC/FPGA Verification (Onsite)

ASIC Verification Engineer - New College Grad 2026

ASIC Clocks Verification Engineer - New College Grad 2026

ASIC Verification Engineer - GPU

Senior ASIC/FPGA Verification Engineer (Onsite)

ASIC Verification Engineer

Senior ASIC Verification Engineer

Principal ASIC Design Verification Engineer - Terawave

Cell Modeling and Verification Engineer - New College Grad 2026

ASIC Design Verification Engineer (Santa Clara, CA)

ASIC/FPGA Senior Verification Engineer - Milwaukee, WI or Mayfield Heights, OH

ASIC Verification Engineer

Senior ASIC Design Verification Engineer

FPGA Design Manager / Section Lead

Advanced ASIC FPGA Design Engineer for Crypto and Cross Domain Solutions

Lead ASIC DFT Engineer

Senior Principal ASIC FPGA Engineer

Senior ASIC Digital Design Engineer

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