Top 153 Cadence Design Jobs

DFT Design Engineer
Cadence Design Systems —Austin, TX
- Full-time
- Mid-level
- Analysis skills
- 2 years
Order Admin Manager
Cadence Design Systems —San Jose, CA
- $126,000 - $234,000 a year
- Full-time
- Mid-level
- Employee stock purchase plan
- Paid holidays
Sr Principle Design Engineer
Cadence Design Systems —Cary, NC
- Full-time
- Senior level
Lead Design Engineer
Cadence Design Systems —San Jose, CA
- $114,800 - $213,200 a year
- Full-time
- Master's degree
- Bachelor's degree
- Senior level
- Employee stock purchase plan
- Paid holidays
Application Engineer
Cadence Design Systems —San Jose, CA
- $74,200 - $137,800 a year
- Full-time
- Office
- Bachelor's degree
- Python
- Employee stock purchase plan
- Paid holidays
Software Engineer I
Cadence Design Systems —Austin, TX
- $88,900 - $165,100 a year
- Full-time
- Computer science
- Computer Science
- Bachelor of Science
- Employee stock purchase plan
- Paid holidays
Principal Design Engineer
Cadence Design Systems —Austin, TX
- Full-time
- Mentoring
- Senior level
- Communication skills
Design Engineering Architect
Cadence Design Systems —Austin, TX
- Full-time
- Computer Science
- Bachelor of Science
- Mentoring
Sr Principal AE – Allegro PCB Design Tools
Cadence Design Systems —Indiana
- Full-time
- Remote
- English
- Master's degree
- Travel
- Work from home
Sr. Executive Administrator
Cadence Design Systems —San Jose, CA
- $45.09 - $83.75 an hour
- Full-time
- Hybrid work
- 7 years
- Microsoft Excel
- Microsoft Outlook
- Employee stock purchase plan
- Paid holidays
Inside Sales Representative
Cadence Design Systems —Michigan
- Full-time
- Mid-level
- Organizational skills
- Communication skills
RTL2GDS, Senior Principal Design Engineer
Cadence Design Systems —Austin, TX
- Full-time
- 7 years
- Bachelor of Science
- Analysis skills
Outbound Marketing Manager
Cadence Design Systems —San Jose, CA
- $154,000 - $286,000 a year
- Full-time
- Marketing
- Mid-level
- 3 years
- Employee stock purchase plan
- Paid holidays
Business Systems Analyst
Cadence Design Systems —San Jose, CA
- $39.71 - $73.75 an hour
- Full-time
- Computer Science
- Mid-level
- Finance
- Employee stock purchase plan
- Paid holidays
Scientific Software Developer II – Modeler
Cadence Design Systems —Santa Fe, NM
- Full-time
- Mid-level
- Doctor of Philosophy
- Under 1 year
Memory Interface PHY IP, Design Engineering Architect
Cadence Design Systems —San Jose, CA
- $136,500 - $253,500 a year
- Full-time
- 11+ years
- Senior level
- Electrical Engineering
- Employee stock purchase plan
- Paid holidays
Lead Scientific Developer – Biologics & Protein Design
Cadence Design Systems —Santa Fe, NM
- Full-time
- 5 years
- Office
- Doctor of Philosophy
Sr. Principal Physical Design AE
Cadence Design Systems —San Jose, CA
- $143,500 - $266,500 a year
- Full-time
- Computer Science
- Bachelor of Science
- Senior level
- Employee stock purchase plan
- Paid holidays
Scientific Sales Executive
Cadence Design Systems —California
- Full-time
- 5 years
- Mid-level
- Bachelor's degree
Technical Support Engineer
Cadence Design Systems —Livonia, MI
- Full-time
- Master's degree
- Travel
- US work authorization
- Opportunities for advancement

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DFT Design Engineer

Cadence Design Systems -
Austin, TX

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Job Details

Full-time

Qualifications

Defect resolution root cause analysis
Engineering development testing
Verification (System development task)
Defect analysis
SoC
Digital circuit design
Design engineering
Developing automated testing protocols
Test analysis
Debugging
Failure analysis

Full Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

US citizenship Required

We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation. It is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches.

Requirements;

Prior 2-10 years of professional experience in SoC/ASIC Digital Design with focus on Design for Test (DFT)
Should possess intimate knowledge of DFT insertion flows
Basic scan chain insertion using synthesis or other software tools
Experience in compression scan insertion, LBIST and other scan technologies
Intimate knowledge of memory build-in self-test (MBIST)
Expertise in Automatic Test Pattern Generation (ATPG) to achieve design test coverage goals
Debug and Analysis of failures to improve fault coverage
Verification of ATPG testbenches and debugging root cause of simulation mis-compares
Working knowledge of JTAG 1149.1/6, IEEE1500 and IEEE1687
Knowledge of timing analysis and equivalency checks would be added bonus
US citizenship Required
Ability to work in collaborative team environment
Prior experience with Cadence tools and flows is highly desirable
Should be able to finish DFT tasks independently
Strong problem-solving skills. Exhibit discipline, thoroughness, and methodical approach in solving problems
Ability to work with stakeholders across cross-functional teams – Architecture, Design, Internal and External Customers
Self-driven and committed individual who can work in a fast-paced project environment

We’re doing work that matters. Help us solve what others can’t.

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Refine Your Search

Cadence Design jobs

DFT Design Engineer

Order Admin Manager

Sr Principle Design Engineer

Lead Design Engineer

Application Engineer

Software Engineer I

Principal Design Engineer

Design Engineering Architect

Sr Principal AE – Allegro PCB Design Tools

Sr. Executive Administrator

Inside Sales Representative

RTL2GDS, Senior Principal Design Engineer

Outbound Marketing Manager

Business Systems Analyst

Scientific Software Developer II – Modeler

Memory Interface PHY IP, Design Engineering Architect

Lead Scientific Developer – Biologics & Protein Design

Sr. Principal Physical Design AE

Scientific Sales Executive

Technical Support Engineer

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