Top 1939 Engineer Asic Design Jobs

Principal Engineer - FPGA/ASIC Design
Rolls-Royce —Indianapolis, IN
- $113,179 - $183,916 a year
- Full-time
- Hybrid work
- Office
- Windows
- 3 years
- Paid parental leave
- Health savings account
1d
Senior ASIC Digital Design Engineer
General Dynamics Mission Systems, Inc —Annapolis Junction, MD
- $142,166 - $150,000 a year
- Full-time
- Hybrid work
- Computer Science
- 3 years
- Master's degree
Senior FPGA / ASIC Design Assurance Engineer
Cyient —Melbourne, FL
- $101,037.27 - $121,679.30 a year
- Full-time
- Background check
- Computer Science
- 8 years
- Health savings account
- Relocation assistance
Quick Apply
14d
Lead ASIC DFT Engineer
Cyient —Remote
- From $100 an hour
- Full-time
- Remote
- Analysis skills
- Mentoring
- Senior level
Quick Apply
Advanced FPGA & ASIC Engineer with strong RTL (Verilog/SystemVerilog)
Revolution Technologies, LLC —Minneapolis, MN
- $82 - $90 an hour
- Contract
- Background check
- Master's degree
- Analysis skills
- Health insurance
- Dental insurance
Quick Apply
Lead ASIC Digital Design Engineer
General Dynamics Mission Systems, Inc —Annapolis Junction, MD
- $176,512 - $187,000 a year
- Full-time
- Hybrid work
- 5 years
- Master's degree
- Analysis skills
Senior ASIC Floorplan Design Engineer
NVIDIA —Austin, TX
- $196,000 - $310,500 a year
- Full-time
- Computer science
- Computer Science
- CAD
ASIC Design Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $100,000 - $189,750 a year
- Full-time
- Computer science
- Computer Science
- Bachelor of Science
4d
ASIC Clocks Design Engineer - New College Grad 2026
NVIDIA —Austin, TX
- $100,000 - $189,750 a year
- Full-time
- Mid-level
- Electrical Engineering
ASIC Design Engineer - Hardware
NVIDIA —Austin, TX
- $116,000 - $218,500 a year
- Full-time
- Hybrid work
- Bachelor of Science
- Mid-level
- Analysis skills
ASIC Design Engineer
NVIDIA —Santa Clara, CA
- $116,000 - $218,500 a year
- Full-time
- Computer science
- Computer Science
- Bachelor of Science
ASIC Floorplan Design Engineer - New College Grad 2026
NVIDIA —Santa Clara, CA
- $100,000 - $189,750 a year
- Full-time
- Computer science
- Computer Science
- CAD
ASIC Design Verification Engineer (Remote)
Encore Semi, Inc. —Dallas, TX
- $120,000 - $135,000 a year
- Full-time
- Remote
- Computer Science
- Mid-level
- Master's degree
- AD&D insurance
- Paid holidays
5d
ASIC Design Efficiency Engineer
NVIDIA —Austin, TX
- $116,000 - $218,500 a year
- Full-time
- System design
- Mid-level
- Experience equivalent to degree accepted
ASIC Digital Design, Principal Engineer
Synopsys —Austin, TX
- $166,000 - $249,000 a year
- Analysis skills
- Continuous improvement
- Mentoring
ASIC Design Engineer
Blue Origin —Central, TX
- Full-time
- Background check
- Bachelor of Science
- DOT physical examination
- Paid parental leave
- Paid holidays
ASIC Design Verification Engineer
Positron AI —Remote
- $200,000 - $350,000 a year
- Full-time
- Remote
- Master's degree
- 8 years
- Analysis skills
Quick Apply
Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
NVIDIA —Santa Clara, CA
- $168,000 - $310,500 a year
- Full-time
- Computer Science
- Master's degree
- 8 years
Senior ASIC Design Verification Engineer
NVIDIA —Santa Clara, CA
- $136,000 - $218,500 a year
- Full-time
- Hybrid work
- 3 years
- Analysis skills
- Continuous improvement
ASIC Design Verification Engineer
Cisco Systems —San Jose, CA
- $146,700 - $277,600 a year
- Full-time
- Master's degree
- Bachelor's degree
- Doctor of Philosophy
- Paid parental leave
- Paid holidays

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Engineer Asic Design jobs near

Principal Engineer - FPGA/ASIC Design

Rolls-Royce -
Indianapolis, IN

Apply Now

Job Details

Full-time
$113,179 - $183,916 a year
1 day ago

Benefits

Paid parental leave
Health savings account
AD&D insurance
Paid holidays
Disability insurance
Relocation assistance
Health insurance
Dental insurance
Flexible spending account
Tuition reimbursement
Paid time off
Family leave
Parental leave
Employee assistance program
Vision insurance
401(k) matching
Employee discount
Life insurance

Qualifications

MATLAB
Electronics test execution
Engineering phase involvement
Engineering development testing
Verification (System development task)
FPGA
Software coding
Electronics Engineering
Electrical technical documentation
VHDL
Git
Windows
Electronics design
3 years
Verilog
Development environments
System design for system development
Bachelor's degree in engineering
SVN
Doctor of Philosophy
Computer hardware
Design development
Version control systems
Doctoral degree in computer engineering
Simulink
Design engineering
Computer Engineering
Systems engineering
Electronics test documentation
Oscilloscopes

Full Job Description

Job Description

Job Title: Principal Engineer - FPGA/ASIC Design

Working Pattern: Full-time

Working location: Indianapolis, IN or West Lafayette, IN (Hybrid Work Schedule )

Rolls-Royce is looking for a Principal Engineer - FPGA/ASIC Design Specialist (Field Programmable Gate Arrays / Application Specific Integrated Circuit) Design Specialist to join our growing team.

This is an exciting opportunity to work on flagship Rolls-Royce programs and play a vital role in solving some of the most complex and interesting technological challenges in the industry while being part of a global, multi-disciplinary team. In this role, you will travel up to 25% between Rolls-Royce sites in Indianapolis and West Lafayette, IN as needed for work.

In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which will be integrated in current and future Rolls-Royce engine control system products. You will be responsible for developing FPGA/ASIC architectures, coding, running simulations, synthesis, creating test benches, and preparing documentation to be reviewed by certification authorities.

***This position is eligible for a hybrid work schedule allowing for remote and in-office days each week. Hybrid work arrangements are subject to change based on business needs and/or changes in company policy. All hybrid employees must have a secure, high-speed internet connection and an appropriate workspace that complies with applicable information security and confidentiality requirements.

Why Rolls-Royce?

Rolls-Royce is one of the most enduring and iconic brands in the world and has been at the forefront of innovation for over a century. We design, build and service systems that provide critical power to customers where safety and reliability are paramount.

We are proud to be a force for progress, powering, protecting and connecting people everywhere.

We want to ensure that the excellence and ingenuity that has shaped our history continues into our future and we need people like you to come and join us on this journey.

Rolls-Royce has been recognized as the top employer in the Engineering & Manufacturing category on the prestigious Forbes Top Employers for Engineers list for 2025. This ranking highlights our commitment to innovation, employee development, and fostering a collaborative environment where engineers can thrive.

Be part of a team that sets the industry standard and drives groundbreaking solutions.

At Rolls-Royce, we are committed to creating a workplace where all employees feel respected, supported, and empowered to do their best work. We foster a welcoming and innovative work environment that invests in you, giving you access to an incredible breadth and depth of opportunities where you can grow your career and make a difference.

Rolls-Royce is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to any protected characteristics.

What you will be doing

With this attractive opportunity you will get a chance to:

Participate in all phases of project, to produce detailed design documentation, verification plans and reports
The design and development of all custom digital devices (ASIC or FPGA), to support RR electronic engine control units
The verification of complex products that use FPGAs and/or ASICs to DO-254
Develop RTL utilizing a hardware description language (e.g. VHDL, Verilog, and/or SystemVerilog) and debug the design via simulation tools
Expertise achieving timing closure on FPGA designs and generating test benches
Evaluate the process flow including but not limited to high level design, synthesis, place and route, timing constraints and power utilization

Who we’re looking for:

At Rolls-Royce we put safety first, do the right thing, keep it simple and make a difference. These principles form the behaviours that guide us and are an essential component of our assessment process. They are the fundamental qualities that we seek for all roles.

Basic Requirements:

Bachelor's degree in Electronics Engineering and/or Computer Engineering with 5+ years of experience, OR
Master's degree in Electronics Engineering and/or Computer Engineering with 3+ years of experience, OR
PhD in Electronics Engineering and/or Computer Engineering
In order to be considered for this role, you must be a U.S. Citizen

Preferred Requirements:

Validate the FPGA hardware in the lab using test equipment (oscilloscopes, logic analyzers) and debug tools (e.g ILA, JTAG)
Experience in scripting with languages such as TCL, Python, Shell scripts
Able to work with Windows and Linux development environment
Demonstrable experience in version control, such as Git, SVN
Experience of Actel & Xilinx tool flows to implement complete designs
Development of model-based systems with digital engineering toolsets (MATLAB, Simulink and/or similar)
Knowledge of systems engineering, and robust design tools and techniques coupled with the latest model-centric development approaches
Experience with Cameo Systems Modeler (MagicDraw) or similar SysML modelling software

What we offer

We offer excellent development opportunities, a competitive salary, and exceptional benefits. These include bonus, employee support assistance and employee discounts.

Your needs are as unique as you are. Hybrid working is a way in which our people can balance their time between the office, home, or another remote location. It’s a locally managed and flexed informal discretionary arrangement.

As a minimum we’re all expected to attend the workplace for collaboration and other specific reasons, on average three days per week.

Relocation assistance is available for this position.

Closing date: August 15th, 2026

#CLOLI

Job Category

Electrical and Electronics

Job Posting Date

21 Jul 2026; 00:07

Pay Range

$113,179 - $183,916-Annually

Location:

Indianapolis, IN

Benefits

Rolls-Royce provides a comprehensive and competitive Total Rewards package that includes base pay and a discretionary bonus plan. Eligible employees may have the opportunity to enroll in other benefits, including health, dental, vision, disability, life and accidental death & dismemberment insurance; a flexible spending account; a health savings account; a 401(k) retirement savings plan with a company match; Employee Assistance Program; Paid Time Off; certain paid holidays; paid parental and family care leave; tuition reimbursement; and a long-term incentive plan. The options available to an employee may vary depending on eligibility factors such as date of hire, employment type, and the applicability of collective bargaining agreements.

Apply Now

Refine Your Search

Engineer Asic Design jobs

Principal Engineer - FPGA/ASIC Design

Senior ASIC Digital Design Engineer

Senior FPGA / ASIC Design Assurance Engineer

Lead ASIC DFT Engineer

Advanced FPGA & ASIC Engineer with strong RTL (Verilog/SystemVerilog)

Lead ASIC Digital Design Engineer

Senior ASIC Floorplan Design Engineer

ASIC Design Engineer - New College Grad 2026

ASIC Clocks Design Engineer - New College Grad 2026

ASIC Design Engineer - Hardware

ASIC Design Engineer

ASIC Floorplan Design Engineer - New College Grad 2026

ASIC Design Verification Engineer (Remote)

ASIC Design Efficiency Engineer

ASIC Digital Design, Principal Engineer

ASIC Design Engineer

ASIC Design Verification Engineer

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

Senior ASIC Design Verification Engineer

ASIC Design Verification Engineer

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