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FPGA System Architect - Electronics Engineer

National Radio Astronomy Observatory -
Charlottesville, VA

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Job Details

Full-time
$90,015 - $138,000 a year

Benefits

Paid holidays
Health insurance
Dental insurance
Paid time off
Vision insurance

Qualifications

Digital signal processing
Systems integration
Team leadership
FPGA
Software deployment
Software implementation
Integration Architecture Design (Architecture design skills)
Integration architecture
Embedded software
Electrical engineering training
Design engineering
Leading team collaboration initiatives
System deployment
FPGA circuit design
Project leadership
Cross-functional communication

Full Job Description

National Radio Astronomy Observatory

Title: FPGA System Architect - Electronics Engineer

Location: NRAO Central Development Lab, 1180 Boxwood Estate Rd, CHARLOTTESVILLE, Virginia, United States of America

Requisition Number: 209

Job Family: Electronics Engineer

Pay Type: Salary

Required Education: ENG

Position Description:

The National Radio Astronomy Observatory (NRAO) is a prestigious research and development organization that plays a vital role in the study of the universe. Associated Universities, Inc. (AUI) is a nonprofit organization that manages and operates the NRAO under a cooperative agreement with the National Science Foundation. The Observatory is a hub for technological and scientific collaboration, operating state-of-the-art radio telescope facilities for use by the international scientific community. The Observatory has been instrumental in the study of black holes, galaxies, and the early universe.

The Central Development Laboratory (CDL) at the NRAO is seeking an experienced FPGA System Architect (Electronics Engineer) to join its digital design team. The engineer will lead the technical execution, integration, and deployment of a digital signal processing system for a next-generation radio telescope synthesis array, guiding the system through implementation, design reviews, integration, and operational deployment while supporting requirements refinement as needed.

CDL's digital design team develops advanced digital signal processing systems that enable radio astronomy research, supporting scientific studies of galaxy formation, the origins of stars and planets, and black holes.

The selected candidate will lead the technical development and execution of FPGA-based systems, with an emphasis on high-throughput digital signal processing, including digitized receiver data acquisition, calibration processing, and frequency channelization. The role combines system-level technical ownership with hands-on FPGA development responsibilities, including RTL development and system integration activities as required.

Working within a small, centralized team, the engineer will collaborate across internal groups and provide technical leadership for systems shared with the international scientific community. The role requires strong time management, the ability to manage multiple concurrent efforts, effective cross-disciplinary communication, and the ability to balance system-level ownership with hands-on development responsibilities.

The location for this position will be based at the Central Development Laboratory in Charlottesville, Virginia.

What You Will be Doing:

Lead the architecture, design, integration, and deployment of the antenna-side FPGA-based digital signal processing system.
Define subsystem decomposition, interfaces, and data flow across FPGA processing elements, embedded software, timing and synchronization systems, digitizers, and external data transport systems
Lead subsystem design reviews and contribute to system-level design reviews
Document system architectures, interfaces, design decisions, and verification approaches

Work Environment

Work is mission driven, team oriented and typically performed in an office setting within a research or development environment.

Who You Are:

Education and Experience:

Bachelor's degree in Electrical Engineering or related field
Eight years of experience developing complex FPGA-based digital signal processing systems
Experience leading the architecture, development, integration, and deployment of FPGA-based systems
Experience defining system architectures, subsystem interfaces, and data flows across FPGA processing, embedded software, and external system interfaces
Experience with timing and synchronization concepts for high-throughput FPGA systems

Skills and Competencies

Strong written and verbal communication skills with demonstrated ability to coordinate technical efforts across multiple teams
Strong leadership ability and
Attention to detail is critical

Additional Requirement

Observatory employees must be authorized to work in the United States. The Observatory presently cannot sponsor H-1B Visas for this position.

Total Rewards:

Compensation

The starting salary of this position is between $90,015-$138,000. Factors which may affect starting pay within this range may include; education, experience, skills, competencies, other qualifications of the successful candidate, as well as internal equity and labor market conditions.

Benefits:

Associated Universities, Inc (AUI) offers a comprehensive benefits package addressing the needs of employees and their families with most benefits beginning on the first day of employment, subject to eligibility requirements. AUI provides:

Excellent paid time off (13 holidays, annual accrual of up to 24 vacation days)
Medical, dental and vision plans are effective on the first day of employment.
AUI’s retirement benefit contributes an amount equal to 10 percent of a qualified participant’s base pay with no required employee contribution.
Click Total Rewards for more information.

Application Instructions:

Select the “Apply” button above. Please be prepared to upload your current Resume and a Cover Letter describing interest and suitability for the position.

Equal Opportunity Employer Statement:

AUI is an equal opportunity employer. To view our complete statement, please visit https://public.nrao.edu/careers/. If you require reasonable accommodation for any part of the application or hiring process, you may submit your request by sending an email to [email protected]. PM20

Compensation details: 90015-126000 Yearly Salary

PI188ede64cfec-25404-40792856

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