Top 1039 Java Technical Lead Jobs in Mountain View, CA

Lead ASIC DFT Engineer
Cyient —San Jose, CA
- $80 - $85 an hour
- Full-time
- Analysis skills
- Mentoring
- In-person
Quick Apply
Hardware Operations Lead / Senior Hardware Technician
VIA Technologies, Inc. —Fremont, CA
- $40 - $45 an hour
- Full-time
- Schematics
- Mid-level
- 3 years
- Health insurance
- Dental insurance
Quick Apply
2d
Lead Application Engineer (8146)
Advantest —San Jose, CA
- $129,000 - $200,000 a year
- Full-time
- Computer Science
- Software troubleshooting
- 5 years
- Health insurance
- Dental insurance
Quick Apply
Event Sales Lead
Blue Link Wireless an Authorized Retailer of AT&T —San Jose, CA
- From $71,000 a year
- Weekends as needed
- Hybrid work
- Spanish
- Clean driving record
- Sales
- Health insurance
- Dental insurance
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9d
Hardware Lead Design Engineer
TMP Worldwide India Private Limited for ERS US —Milpitas, CA
- $83,000 - $128,000 a year
- Email
- Analysis skills
- In-person
- Senior level
- AD&D insurance
- Paid holidays
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Lead Quality Systems Engineer
The Hiring Method, LLC —Fremont, CA
- $100,625 - $172,250 a year
- 5 years
- Bachelor's degree
- US work authorization
- Relocation assistance
- Health insurance
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12d
Photonics Integration Engineer and Technical Lead (7401)
Advantest —San Jose, CA
- $150,000 - $231,850 a year
- Full-time
- Bachelor of Science
- Master's degree
- Analysis skills
- Health insurance
- Dental insurance
Quick Apply
Electrical Engineer Signal Integrity and Power Integrity Technical Lead (7400)
Advantest —San Jose, CA
- $129,650 - $200,400 a year
- Full-time
- Background check
- Bachelor of Science
- System design
- Health insurance
- Dental insurance
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Lead Customer Engineer
Everforth —Santa Clara, CA
- $95,000 - $150,000 a year
- Full-time
- Computer science
- Computer Science
- Mid-level
- Dental insurance
- 401(k)
Quick Apply
11d
Lead Electrical Engineer
Coherent Corp. —Fremont, CA
- $100,625 - $172,250 a year
- Overtime
- Mid-level
- Office
- Doctor of Philosophy
Lead Applications Engineer, Innovation Center (Customer Facing)
recruitAbility —San Jose, CA
- $150,000 - $175,000 a year
- Full-time
- Java
- Presentation skills
- Senior level
Team Leader - Maintenance
Rich Products Corporation —Union City, CA
- $86,814 - $117,454 a year
- Bachelor of Science
- Engineering
- 3 years
- Health insurance
- Paid time off
Day Lead Technician - Full-Time
Sweeping Corporation of America —San Jose, CA
- $45 - $55 an hour
- Full-time
- Background check
- 18 years or older
- Clean driving record
- Paid holidays
- Disability insurance
Quick Apply
Interior Design Team Leader (Luxury Residential)
Leoforce —San Jose, CA
- $125,000 - $160,000 a year
- Residential
- Senior level
- Communication skills
Quick Apply
Lead SoC Architect
Everforth —Los Altos, CA
- $200,000 - $300,000 a year
- Full-time
- Computer science
- Management
- Computer Science
- Health insurance
- Dental insurance
Quick Apply
3d
Facilities & Client Relations Manager / Lead Coordinator
LGTC Group —Burlingame, CA
- From $27 an hour
- Full-time
- Mid-level
- Administrative experience
- Bachelor's degree
- Dental insurance
- 401(k)
Quick Apply
Lead, IT Applications
Ross Stores —Dublin, CA
- $109,900 - $187,450 a year
- Hybrid work
- 7 years
- Office
- Analysis skills
5d
SoC Verification Lead
NVIDIA —Santa Clara, CA
- $232,000 - $368,000 a year
- Full-time
- 11+ years
- Master's degree
- Experience equivalent to degree accepted
Lead Manufacturing Technician
Nova Pneuma, Inc. —Fremont, CA
- $32 - $55 an hour
- 6 years
- Office
- High school diploma or GED
Quick Apply
Lead UI Software Engineer (Java)
KnowledgeLoop —San Mateo, CA
- Linux
- Senior level
- HTML

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Lead ASIC DFT Engineer

Cyient -
San Jose, CA

Quick Apply

Job Details

Full-time | Contract
$80 - $85 an hour

Qualifications

Analog circuit design
Engineering development testing
Electronics functional testing
Integrated circuits (ICs)
Ramps
Analysis skills
SoC
System architecture design
Simulation tools
Root cause analysis
Test analysis
Python
Debugging
Cross-functional communication

Full Job Description

Title - Lead ASIC DFT Engineer

Location – San Jose, CA.

Duration - Contract

Job Description

Experience

10+ years of hands-on experience in ASIC Design-for-Test (DFT)

Role Summary

We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.

The ideal candidate will have strong hands-on expertise in DFT fundamentals, fault models, test coverage, diagnosis, and debug, as well as the ability to evaluate and adopt emerging DFT methodologies and architecture schemes to improve robustness, quality, and yield.

Key Responsibilities

Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
Act as a technical escalation point for advanced DFT and post-silicon debug issues.
Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.

Required Skills & Qualifications

Strong hands-on experience in ASIC DFT with end-to-end ownership.
Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.
Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.
Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.
Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.
Experience with MBIST implementation and verification; SMS experience preferred.
Experience with scan architecture and scan chain stitching; Tessent/SSN experience preferred.
Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and physical design implementation.
Proven post-silicon debug and silicon bring-up experience.
Exposure to large SoC designs, hierarchical DFT flows, and multi-domain integration challenges.
Strong communication skills and the ability to work independently with minimal ramp-up.

Preferred Experience

MBIST post-silicon validation.
ATPG simulations and fault coverage debug.
DFT RTL, DFD, DFT verification, and IP-level DFT integration.
DFT SDC creation and DFT timing closure support.
Boundary scan, iJTAG, SSN, and design-for-debug methodologies.
TCL/PERL scripting for DFT automation, reporting, and debug.
Experience working across multiple ASIC technology nodes and complex product development cycles.
Familiarity with yield learning, diagnosis, and manufacturing test optimization.

Pay: $80.00 - $85.00 per hour

Work Location: In person

Quick Apply

Refine Your Search

Java Technical Lead jobs in Mountain View, CA

Lead ASIC DFT Engineer

Hardware Operations Lead / Senior Hardware Technician

Lead Application Engineer (8146)

Event Sales Lead

Hardware Lead Design Engineer

Lead Quality Systems Engineer

Photonics Integration Engineer and Technical Lead (7401)

Electrical Engineer Signal Integrity and Power Integrity Technical Lead (7400)

Lead Customer Engineer

Lead Electrical Engineer

Lead Applications Engineer, Innovation Center (Customer Facing)

Team Leader - Maintenance

Day Lead Technician - Full-Time

Interior Design Team Leader (Luxury Residential)

Lead SoC Architect

Facilities & Client Relations Manager / Lead Coordinator

Lead, IT Applications

SoC Verification Lead

Lead Manufacturing Technician

Lead UI Software Engineer (Java)

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