Top 20 Perl Module Development Jobs in Mountain View, CA

Staff R&D Engineer-17367
Synopsys —Sunnyvale, CA
- $138,000 - $207,000 a year
- Software troubleshooting
- Data analysis skills
- 3 years
ASIC Engineer, Design Verification
Meta —Sunnyvale, CA
- $114,000 - $172,000 a year
- Mid-level
- Organizational skills
- Fair chance
7d
R&D Engineering, Staff Engineer
Synopsys —Sunnyvale, CA
- $138,000 - $207,000 a year
- Software troubleshooting
- 3 years
- Analysis skills
11d
Linux Systems Administrator
Bloom Energy —San Jose, CA
- $134,500 - $193,500 a year
- Full-time
- 5 years
- System design
- Mid-level
- Health insurance
- Dental insurance
ASIC Design Engineer
Hewlett Packard Enterprise —Sunnyvale, CA
- $120,000 - $243,000 a year
- Full-time
- Office
- Master's degree
- Analysis skills
Power Delivery and Power Integrity Architect
Qualcomm —Santa Clara, CA
- $180,500 - $270,700 a year
- Computer science
- Computer Science
- Engineering
4d
Sr FPGA Designer
Intuitive Surgical —Sunnyvale, CA
- $153,300 - $259,600 a year
- Day shift
- Surgery
- Bachelor of Science
- Master's degree
Circuit Design Engineer - Standard Cell
NVIDIA —Santa Clara, CA
- $116,000 - $189,750 a year
- Full-time
- Mid-level
- 3 years
- Electrical Engineering
Design Verification Engineer - Machine Learning Accelerators
Meta —Sunnyvale, CA
- $178,000 - $250,000 a year
- Computer science
- Computer Science
- 5 years
Server Administrator Linux
Bloom Energy —San Jose, CA
- $134,500 - $193,500 a year
- Full-time
- 5 years
- System design
- Office
- Health insurance
- Dental insurance
ASIC/SoC Design Verification Engineer
TETRAMEM INC —San Jose, CA
- $110,000 - $300,000 a year
- Full-time
- 3 years
- Senior level
- Leadership
Quick Apply
ServiceNow Solution Architect
Tata Consultancy Services —Union City, CA
- $160,000 - $210,000 a year
- Team management
- Mentoring
- Senior level
SoC Digital Verification Engineer, Multimedia Lab
TikTok —San Jose, CA
- $156,000 - $316,800 a year
- Computer Science
- Mid-level
- Analysis skills
- Paid parental leave
- Paid holidays
Design Verification Engineer
Advanced Micro Devices, Inc —Santa Clara, CA
- Hybrid work
- Master's degree
- Bachelor's degree
- Mentoring
16h
Audio SW Dev Engineer , Edge Technology
Amazon.com Services LLC —Sunnyvale, CA
- $165,200 - $223,600 a year
- Full-time
- Computer science
- Computer Science
- Java
- AD&D insurance
- Health insurance
Principal ASIC Design Engineer
Hewlett Packard Enterprise —Sunnyvale, CA
- $174,000 - $352,500 a year
- Full-time
- Office
- Master's degree
- Analysis skills
Senior SoC Digital Verification Engineer, Multimedia Lab
TikTok —San Jose, CA
- $212,800 - $450,000 a year
- Computer Science
- 3 years
- Analysis skills
- Paid parental leave
- Paid holidays
Senior ASIC Design Engineer, Hardware Compute Group
Amazon.com Services LLC —Sunnyvale, CA
- $183,000 - $247,600 a year
- Full-time
- Master's degree
- Analysis skills
- Doctor of Philosophy
- AD&D insurance
- Health insurance
ASIC Design Verification Engineer, Technical Leader
Cisco Systems —San Jose, CA
- $163,600 - $303,100 a year
- Full-time
- Office
- Master's degree
- 8 years
- Paid parental leave
- Paid holidays

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Staff R&D Engineer-17367

Synopsys -
Sunnyvale, CA

Apply Now

Job Details

$138,000 - $207,000 a year

Qualifications

Software engineering
Software troubleshooting
Automation
Data structures
Version control systems
Software testing
Linux
Debugging
Providing code feedback

Full Job Description

Date posted 06/04/2026

Category Engineering Hire Type Employee Job ID 17641 Base Salary Range $138000-$207000 Remote Eligible No Date Posted 06/04/2026

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

An innovative and driven software engineer with a solid foundation in C++ and object-oriented programming. You have a passion for solving complex problems and a keen interest in exploring cutting-edge solutions. Debugging is not a chore for you; it is a puzzle you enjoy solving.

You are drawn to problems that sit at the intersection of physics, mathematics, and software. Parasitic extraction, capacitance modeling, algorithmic optimization, these are not abstract concepts to you. You do not need someone to hand you a perfect spec. You talk to domain experts, ask the right questions, and figure out what needs to be built.

Machine learning and optimization techniques interest you not because they are trendy, but because they might solve the problem better. At Synopsys, you will work on StarRC, the tool that sets the standard for parasitic extraction in the semiconductor industry. What you build will directly enable the next generation of chips.

What You'll Be Doing

Design, develop, and maintain core components of StarRC, the industry gold standard parasitic extraction tool used across leading semiconductor companies
Build and refine capacitance models that enable accurate extraction for advanced technology nodes, often before the competition catches up
Develop next-generation parasitic extraction algorithms focused on runtime reduction, memory efficiency, and capacity improvements for increasingly complex designs
machine learning techniques to optimize extraction flows
Collaborate directly with domain experts in electromagnetics, circuit modeling, and verification to solve tough technical problems that span multiple disciplines
Debug complex issues in a large C++ codebase, trace problems across modules, and deliver fixes that improve tool stability and accuracy

The Impact You Will Have

Keep StarRC at the leading edge of parasitic extraction technology, directly influencing how the world's most advanced chips are designed
Enable semiconductor companies to adopt new process technologies faster by delivering accurate models and extraction flows ahead of industry timelines
Reduce customer runtime and memory usage by double-digit percentages, translating to real cost savings and faster design cycles for chips powering AI, automotive, and mobile devices
Push the boundaries of what is possible in EDA by integrating machine learning and optimization techniques into production-grade extraction tools
Improve the reliability and accuracy of a tool that thousands of engineers depend on daily for tape out-critical work
Shape the future of electronics by contributing to the software infrastructure that makes next-generation semiconductor design feasible

What You'll Need

MS with at least 3 years of software development experience, or PhD with focused research in algorithms, numerical methods, or related areas. Doctorate or equivalent industry depth is preferred
Strong C++ programming skills with experience building and debugging performance-critical software in large codebases
Solid understanding of data structures, algorithms, and software development processes including version control, testing, and code review
Experience working in a Linux environment and comfort with scripting languages like Python, Tcl, or Perl for automation and analysis
Background in numerical mathematics, optimization, machine learning, or computational electromagnetics is a strong plus, especially as applied to EDA or physical modeling problems

Who You Are

A proactive and collaborative team player
Detail-oriented with strong problem-solving skills
ing new technologies
Effective communicator with the ability to convey complex technical concepts clearly
Adaptable and able to thrive in a fast-paced, dynamic environment

The Team You'll Be Part Of

You will join a high-performing R&D team dedicated to advancing StarRC, the market-leading interconnect parasitic extraction tool. The team is composed of domain experts in electromagnetics, algorithm development, and software engineering who work collaboratively to tackle complex technical challenges. You will be working closely with both local and global team members, contributing to a tool that is critical to semiconductor design flows worldwide. The environment is technical, supportive, and focused on continuous improvement.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

#LI-DP1

#TPG

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can

Apply Now

Refine Your Search

Perl Module Development jobs in Mountain View, CA

Staff R&D Engineer-17367

ASIC Engineer, Design Verification

R&D Engineering, Staff Engineer

Linux Systems Administrator

ASIC Design Engineer

Power Delivery and Power Integrity Architect

Sr FPGA Designer

Circuit Design Engineer - Standard Cell

Design Verification Engineer - Machine Learning Accelerators

Server Administrator Linux

ASIC/SoC Design Verification Engineer

ServiceNow Solution Architect

SoC Digital Verification Engineer, Multimedia Lab

Design Verification Engineer

Audio SW Dev Engineer , Edge Technology

Principal ASIC Design Engineer

Senior SoC Digital Verification Engineer, Multimedia Lab

Senior ASIC Design Engineer, Hardware Compute Group

ASIC Design Verification Engineer, Technical Leader