Top 133 Sram Design Engineer Jobs

Senior SRAM Layout Design Engineer
NVIDIA —Austin, TX
- $132,000 - $235,750 a year
- Full-time
- Hybrid work
- Schematics
- Team management
- Mentoring
Senior SRAM Circuit Design Engineer
NVIDIA —Santa Clara, CA
- $168,000 - $310,500 a year
- Full-time
- Hybrid work
- 6 years
- Data analysis skills
- Analysis skills
SRAM Circuit Design Engineer
Apple —Santa Clara, CA
- $150,400 - $277,600 a year
- Bachelor of Science
- Data analysis skills
- Mid-level
- Employee stock purchase plan
- Health insurance
11d
Circuit Design Engineer - Standard Cell
NVIDIA —Santa Clara, CA
- $116,000 - $189,750 a year
- Full-time
- Mid-level
- 3 years
- Electrical Engineering
Technical Staff Engineer - Analog Design (SRAM Design)
Microchip Technology —San Jose, CA
- $91,000 - $232,000 a year
- Full-time
- Computer science
- Computer Science
- Data analysis skills
- Employee stock purchase plan
- Health insurance
CPU SRAM Design Engineer
Qualcomm —Austin, TX
- $122,500 - $183,700 a year
- Computer Science
- Bachelor of Science
- 3 years
Digital Design Engineer
FLC Technology Group —Santa Clara, CA
- Computer Science
- Mid-level
- Master's degree
Design Engineer
Integrated Silicon Solution —Milpitas, CA
- 7 years
- Bachelor of Science
- Engineering
- Flexible schedule
Memory Circuit Design Engineer
TetraMem INC —Fremont, CA
- Multiple hires
- 5 years
- Doctor of Philosophy
- Senior level
- Health insurance
- 401(k)
Quick Apply
Circuit Design Engineer
Ampere Computing —Durham, NC
- $147,000 - $220,000 a year
- Full-time
- Hybrid work
- No experience needed
- Mid-level
- 3 years
- Paid holidays
- Health insurance
CPU Memory Design Engineer
Intel —Austin, TX
- $122,440 - $232,190 a year
- Full-time
- Hybrid work
- Mid-level
- 3 years
- Master's degree
- Health insurance
Design Engineer
SRAM Corporation —Colorado Springs, CO
- $80,000 - $120,000 a year
- Bachelor of Science
- Mid-level
- Office
- Disability insurance
- Health insurance
CPU SRAM Design Engineer - Sr Staff / Principal
Qualcomm —Austin, TX
- $179,000 - $268,400 a year
- Computer Science
- Bachelor of Science
- Analysis skills
Lead RTL Design Engineer
Efficient Computer —Pittsburgh, PA
- $160,000 - $250,000 a year
- 8 years
- Continuous improvement
- Team management
- Paid parental leave
- Parental leave
Quick Apply
ATE Test Engineer
NVIDIA —Santa Clara, CA
- $132,000 - $207,000 a year
- Full-time
- Mid-level
- 3 years
- Java
DRAM Design Engineer
Micron —Boise, ID
- System design
- Mid-level
- Master's degree
- Employee stock purchase plan
- Paid holidays
Sr Layout Design Engineer
TEK —Santa Clara, CA
- Full-time
- Schematics
- Mentoring
- In-person
Quick Apply
4d
Memory Circuit Design Engineer
Intel —Hillsboro, OR
- $122,440 - $232,190 a year
- Full-time
- Hybrid work
- Mid-level
- Master's degree
- Doctor of Philosophy
- Health insurance
Microprocessor VLSI Physical Design Engineer
Advanced Micro Devices, Inc —Fort Collins, CO
- Hybrid work
- Computer Science
- Bachelor of Science
- 8 years
Analog and Mixed Signal Design Engineer
Intel —Hillsboro, OR
- $164,470 - $269,100 a year
- Full-time
- 3 years
- Master's degree
- Doctor of Philosophy
- Health insurance

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Senior SRAM Layout Design Engineer

NVIDIA -
Austin, TX

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Job Details

Full-time
$132,000 - $235,750 a year

Qualifications

Verification (System development task)
Semiconductor electronics
Mentoring
Design for manufacturability (DFM)
Debugging

Full Job Description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

Are you looking for a Mask layout Design Engineer role? We are seeking a hands-on Senior SRAM Layout Engineer to lead the physical layout creation for SRAM and memory IP in advanced CMOS nodes. In this role, you will build custom memory layouts from initial floorplanning through DRC/LVS-clean tapeout, working closely with circuit design, physical design, integration, CAD, and foundry teams. This is a senior individual contributor role for someone who can produce complex layouts, make informed advanced-node tradeoffs, improve layout methodology, and guide junior engineers.

What you will be doing:

Manage the complete custom layout process for SRAM bitcell arrays, memory periphery, test structures, and memory macros in advanced CMOS technologies.
Develop and improve floorplans for SRAM and memory blocks, covering array layout, periphery positioning, power grid design, routing channels, and macro assembly.
Carry out, debug, and complete DRC, LVS, ERC, antenna, and associated physical verification checks with tools such as Calibre, ICV, or similar workflows.
Support EM/IR review, power integrity, density/fill, DFM, dummy insertion, layout-dependent effects, and other requirements for tapeout.
Collaborate with circuit designers to convert schematics into layouts, ensuring matching, symmetry, shielding, parasitic targets, and reliability constraints are maintained.
Collaborate with PnR and integration teams to resolve top-level DRC/LVS, pin access, boundary, routing, power-grid, and macro-integration issues.
Implement and advance layout methodology, checklists, reusable practices, and quality standards for consistent memory IP delivery.
Collaborate with foundry, CAD, and methodology teams on rule interpretation, deck behavior, waivers, and advanced-node process constraints.
Review layouts, mentor junior engineers, and help raise layout quality and execution rigor across the team.

What we need to see:

Have a BSEE or equivalent experience
10+ years of custom IC layout experience, including 5+ years in SRAM, memory compiler, or full-custom memory IP layout.
Hands-on participation in advanced CMOS technology initiatives, preferably concentrating on FinFET or GAA nodes at 5nm, 3nm, or smaller dimensions.
Solid grasp of SRAM and memory layout principles.
Extensive experience in Cadence Virtuoso applied to custom layout creation and assessment.
Extensive experience in DRC/LVS debugging using Calibre, ICV, or similar physical verification tools.
Experience with floorplanning, block-level routing, macro assembly, pin planning, boundary/interface management, and top-level physical verification.
Direct familiarity with advanced-node layout limitations and layout-dependent phenomena, including LOD, density/fill, matching, symmetry, shielding, electromigration, IR drop, and DFM or similar expertise.
Ability to work effectively with circuit build, physical build, integration, CAD, and foundry teams.
Clear communication, strong ownership, good judgment, and the ability to mentor other engineers.

Ways to stand out from the crowd:

Experience in scripting using Cadence SKILL, Python, or comparable languages for layout automation, checks, reporting, or improving workflows.
Strong familiarity with EM/IR, reliability, density, fill, DFM, and post-processing closure at both IP and top level.

Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 132,000 USD - 207,000 USD for Level 4, and 148,000 USD - 235,750 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until June 17, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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