Top 122 Systemc Jobs | SimplyHired

ASIC & FPGA Design Engineer
People Integra LLC. —Grand Prairie, TX
- $50.00 - $88.99 an hour
- Full-time
- Hybrid work
- Background check
- Laboratory experience
- 3 years
Quick Apply
8h
#Virtual Platform Engineer
Qualcomm —Santa Clara, CA
- $111,300 - $166,900 a year
- Remote
- Computer science
- Computer Science
- Engineering
Staff Software Modeling Engineer
Arm —Waltham, MA
- $198,100 - $268,000 a year
- Email
- C++
- Senior level
- Communication skills
Virtual Platform, Principal Engineer
Qualcomm —Austin, TX
- $211,800 - $317,800 a year
- Computer science
- Computer Science
- 5 years
DV Engineers
Ambit Semiconductors —Texas
- 5 years
- Master's degree
- Bachelor's degree
Principal SoC Performance Architect – Next-Generation Server Platforms
Arm —San Jose, CA
- $262,700 - $355,400 a year
- Email
- Computer Science
- System design
- Master's degree
Senior Mixed-Signal Verification Engineer
K2 Space —Remote
- $160,000 - $230,000 a year
- Remote
- 5 years
- Doctor of Philosophy
- Senior level
- Paid parental leave
- Health insurance
ASIC Design Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)
ByteDance —San Jose, CA
- $122,574 - $256,000 a year
- Multiple hires
- Computer Science
- Bachelor of Science
- Master's degree
- Paid parental leave
- Paid holidays
Applications Engineer - FPGA Prototyping
Siemens —Wilsonville, OR
- $334,400 a year
- Full-time
- Hybrid work
- 5 years
- Bachelor of Science
- Office
Camera DE Lead Engineer
Qualcomm —San Diego, CA
- $179,000 - $268,400 a year
- Computer science
- Computer Science
- Java
Staff SoC Performance Architect – Next-Generation Server Platforms
Arm —San Diego, CA
- $198,100 - $268,000 a year
- Email
- 6 years
- Computer Science
- System design
Senior Architect, Simulation Kernel Modelling
NVIDIA —Santa Clara, CA
- $184,000 - $356,500 a year
- Full-time
- Computer science
- Computer Science
- Experience equivalent to degree accepted
Design Verification Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)
ByteDance —San Jose, CA
- $122,574 - $256,000 a year
- Multiple hires
- Computer Science
- Bachelor of Science
- Fair chance
- Paid parental leave
- Paid holidays
Modelling Lead (SystemC / Virtual-Platform Architect)
Lumilens —San Jose, CA
- Full-time
- C++
- Senior level
- Health insurance
- Dental insurance
Applications Engineering Consultant - Emulation
Siemens —Wilsonville, OR
- $146,700 - $293,400 a year
- Full-time
- Hybrid work
- 7 years
- Bachelor of Science
- Office
Modeling and Simulations Specialist
BAE Systems Inc. —Huntsville, AL
- $136,000 - $231,200 a year
- Full-time
- Hybrid work
- Bachelor of Science
- Data analysis skills
- System design
- Health savings account
- Paid holidays
14d
Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development
Qualcomm —San Diego, CA
- $187,000 - $311,400 a year
- Computer science
- Computer Science
- 5 years
OBGYN at Premier Women's Health & Academic Systemc - Rhode Island
Care New England Health System —Providence, RI
- Full-time
- Medicine
- BC/BE
- Inpatient
Chip Simulation Software Engineer
Etched —San Jose, CA
- $200,000 - $250,000 a year
- Full-time
- Software troubleshooting
- Research
- Mid-level
- Health insurance
- Dental insurance
Digital Verification Engineer 2
HII —Fort Meade, MD
- $77,379 - $127,000 a year
- Email
- Computer science
- 6 years
- Computer Science

I want to receive the latest job alert for Systemc

By signing in to your account, you agree to SimplyHired's Terms of Service and consent to our Cookie and Privacy Policy.

Explore jobs in more locations

Systemc jobs near

ASIC & FPGA Design Engineer

People Integra LLC.
Grand Prairie, TX

Quick Apply

Job Details

Full-time | Contract
$50.00 - $88.99 an hour
8 hours ago

Qualifications

Network analyzers
Telecommunications spectrum analyzers
FPGA
Laboratory experience
Electrical system testing
Spectrum analyzer usage
Bachelor's degree
Wireshark
Electrical engineering training
Design engineering
Oscilloscopes
FPGA circuit design
Debugging

Full Job Description

Position Overview

We are seeking a Senior ASIC & FPGA Design Engineer to join our engineering team supporting advanced aerospace and defense programs.
In this role, you will serve as a technical leader responsible for the architecture, design, verification, integration, and validation of high-performance FPGA-based hardware solutions.
You will work closely with cross-functional engineering teams to translate system requirements into reliable, high-quality programmable logic designs while ensuring projects are delivered on schedule and within budget.
The ideal candidate has strong experience in FPGA design, RTL development, digital design, verification, hardware integration, and board-level debugging, with expertise in Xilinx/AMD FPGA technologies and modern FPGA development tools.

Key Responsibilities

Define FPGA/ASIC architecture and design specifications based on system performance, reliability, and safety requirements.
Design, develop, and maintain RTL using VHDL, Verilog, and SystemVerilog.
Develop synthesis, place-and-route, and timing closure strategies to ensure optimal FPGA performance.
Create comprehensive verification plans, simulation environments, and automated testbenches using UVM, SystemC, and Python.
Perform functional simulation, timing verification, and design validation throughout the FPGA development lifecycle.
Lead hardware integration, Hardware-in-the-Loop (HIL) testing, board-level debugging, and system verification activities.
Perform timing analysis, power analysis, and FPGA resource utilization optimization.
Support FPGA implementation using Vivado, Vitis, and Vitis HLS.
Manage source code and configuration control using GitLab or similar version control tools.
Develop engineering documentation including design specifications, verification plans, test reports, and release documentation.
Collaborate with Systems, Software, Hardware, Mechanical, Manufacturing, Test, and Quality Engineering teams.
Mentor junior engineers and promote FPGA development best practices.

Required Qualifications

Bachelor's degree in Electrical Engineering or a closely related STEM discipline from an accredited university. (Master's degree preferred.)
Minimum 3 years of professional experience in FPGA design, development, simulation, and verification.
Strong experience with VHDL, Verilog, and/or SystemVerilog.
Experience with Xilinx/AMD FPGA toolsets, including Vivado, Vitis, and Vitis HLS.
Experience using FPGA simulation tools such as Synopsys VCS.
Strong understanding of digital design principles, including: Timing analysis, Timing closure, Clock Domain Crossing (CDC), Signal integrity
Experience working with high-speed interfaces such as: AXI, PCIe, Ethernet, TCP/IP, Serial communication protocols
Hands-on laboratory debugging experience using oscilloscopes, spectrum analyzers, signal generators, and related electronic test equipment.
Familiarity with Synopsys EDA tools.

Preferred Qualifications

Active DoD Secret or Top-Secret Security Clearance.
Experience supporting missile or defense programs.
Experience with the complete ASIC/FPGA development lifecycle, including architecture, design, simulation, verification, validation, integration, and testing.
Experience with SystemVerilog, Verilog, C/C++, MATLAB, and Simulink.
Experience with: Synopsys Synplify, Synopsys VCS, NCSim, ChipScope
Experience with Xilinx/AMD and Microchip (MicroSemi) FPGA families and IP cores.
Experience implementing cryptographic or NSA encryption algorithms (AES, Counter Mode).
Experience with UVM, Simulink, and HDL Coder integration.
Experience with FPGA board-level troubleshooting and validation.
Experience using GitLab for configuration management.
Knowledge of digital controls and loop-closure applications.
Networking experience including: Ethernet switches, Routers, Firewalls, Wireshark, tcpdump
Excellent communication, teamwork, mentoring, and presentation skills.

BI03

Pay: $50.00 - $88.99 per hour

Application Question(s):

Candidates must have the ability to obtain a Department of Defense (DOD) Secret Security Clearance.

Education:

Bachelor's (Required)

Experience:

FPGA design, development, simulation, and verification: 5 years (Required)
VHDL, Verilog, and/or SystemVerilog: 1 year (Required)

Ability to Commute:

Grand Prairie, TX 75051 (Required)

Work Location: Hybrid remote in Grand Prairie, TX 75051

Quick Apply

Refine Your Search

Systemc jobs

ASIC & FPGA Design Engineer

#Virtual Platform Engineer

Staff Software Modeling Engineer

Virtual Platform, Principal Engineer

DV Engineers

Principal SoC Performance Architect – Next-Generation Server Platforms

Senior Mixed-Signal Verification Engineer

ASIC Design Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)

Applications Engineer - FPGA Prototyping

Camera DE Lead Engineer

Staff SoC Performance Architect – Next-Generation Server Platforms

Senior Architect, Simulation Kernel Modelling

Design Verification Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)

Modelling Lead (SystemC / Virtual-Platform Architect)

Applications Engineering Consultant - Emulation

Modeling and Simulations Specialist

Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development

OBGYN at Premier Women's Health & Academic Systemc - Rhode Island

Chip Simulation Software Engineer

Digital Verification Engineer 2

I want to receive the latest job alert for Systemc

Explore jobs in more locations

Job Seeker Tools

Employer Tools

Browse

Stay Connected