Top 123 Systemc Jobs | SimplyHired

Senior Verification Engineer
Vibotek LLC —Austin, TX
- Full-time
- 7 years
- Senior level
- Communication skills
Quick Apply
DSP Algorithms Engineer
Vibotek LLC —Austin, TX
- Full-time
- Bachelor of Science
- Doctor of Philosophy
- US work authorization
Quick Apply
#Virtual Platform Engineer
Qualcomm —Santa Clara, CA
- $111,300 - $166,900 a year
- Remote
- Computer science
- Computer Science
- Engineering
Staff Software Modeling Engineer
Arm —Waltham, MA
- $198,100 - $268,000 a year
- Email
- C++
- Senior level
- Communication skills
Virtual Platform, Principal Engineer
Qualcomm —Austin, TX
- $211,800 - $317,800 a year
- Computer science
- Computer Science
- 5 years
Senior Mixed-Signal Verification Engineer
K2 Space —Remote
- $160,000 - $230,000 a year
- Remote
- 5 years
- Doctor of Philosophy
- Senior level
- Paid parental leave
- Health insurance
ASIC Design Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)
ByteDance —San Jose, CA
- $122,574 - $256,000 a year
- Multiple hires
- Computer Science
- Bachelor of Science
- Master's degree
- Paid parental leave
- Paid holidays
DV Engineers
Ambit Semiconductors —Texas
- 5 years
- Master's degree
- Bachelor's degree
Design Verification Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)
ByteDance —San Jose, CA
- $122,574 - $256,000 a year
- Multiple hires
- Computer Science
- Bachelor of Science
- Fair chance
- Paid parental leave
- Paid holidays
Modelling Lead (SystemC / Virtual-Platform Architect)
Lumilens —San Jose, CA
- Full-time
- C++
- Senior level
- Health insurance
- Dental insurance
Camera DE Lead Engineer
Qualcomm —San Diego, CA
- $179,000 - $268,400 a year
- Computer science
- Computer Science
- Java
Principal SoC Performance Architect – Next-Generation Server Platforms
Arm —San Jose, CA
- $262,700 - $355,400 a year
- Email
- Computer Science
- System design
- Master's degree
Applications Engineer - FPGA Prototyping
Siemens —Boulder, CO
- $334,400 a year
- Full-time
- Hybrid work
- 5 years
- Bachelor of Science
- Office
Design Verification Engineer
Broadcom —San Jose, CA
- $143,800 - $230,000 a year
- Full-time
- Computer science
- Computer Science
- US work authorization
- Employee stock purchase plan
- Paid holidays
Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development
Qualcomm —San Diego, CA
- $187,000 - $311,400 a year
- Computer science
- Computer Science
- 5 years
Modeling and Simulations Specialist
BAE Systems Inc. —Huntsville, AL
- $136,000 - $231,200 a year
- Full-time
- Hybrid work
- Bachelor of Science
- Data analysis skills
- System design
- Health savings account
- Paid holidays
14d
Senior Architecture Modeling Engineer, AWS Machine Learning Accelerators
Annapurna Labs (U.S.) Inc. —Cupertino, CA
- $193,300 - $261,500 a year
- Full-time
- Computer Science
- 5 years
- System design
- AD&D insurance
- Health insurance
Senior Architect, Simulation Kernel Modelling
NVIDIA —Santa Clara, CA
- $184,000 - $356,500 a year
- Full-time
- Computer science
- Computer Science
- Experience equivalent to degree accepted
Staff SoC Performance Architect – Next-Generation Server Platforms
Arm —San Diego, CA
- $198,100 - $268,000 a year
- Email
- 6 years
- Computer Science
- System design
Applications Engineering Consultant - Emulation
Siemens —Wilsonville, OR
- $146,700 - $293,400 a year
- Full-time
- Hybrid work
- 7 years
- Bachelor of Science
- Office

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Senior Verification Engineer

Vibotek LLC
Austin, TX

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Job Details

Full-time

Qualifications

Verification (System development task)
SystemVerilog

Full Job Description

Senior Verification Engineer

Domain Information technology (IT)

Location USA - Austin

Status Active

=======================================

Senior Verification Engineer

Our client is a Series-D semiconductor innovator, specializing in programmable coherent DSP (digital

signal processing) solutions for cloud and AI infrastructure, a foundational technology that enables

faster and more efficient transmission within and between AI data centers. The firm is empowering

the future of AI infrastructure and cloud connectivity with DSP innovations. The firm recently came

out of stealth with $180MM funding and is backed by storied venture investors including Kleiner

Perkins, Spark Capital, Mayfield and Fidelity Investments.

Responsibilities

Plan and perform the verification of digital design blocks according to the design specification

and interacting with design engineers.

Build verification environments using SystemVerilog and UVM.

Identify and write all types of coverage measures for corner-cases.

Debug the functionality with design engineers.

Perform coverage collection and follow the metrices to close the full functionality.

Requirements

10+ years of experience; At least 7 years of experience in verification – a must.

In depth knowledge in VLSI verification flow, languages and concepts – a must. Performed

atleast 2 or more full block/system verification cycles.

Deep experience in building verification environments using SystemVerilog and UVM or

specman or systemC

Performed at last 2 or more full block/system verification cycles.

Experience in data path or data protocols, specifically Ethernet - preferred

Verification using one of the known methodologies (eRM, UVM, OVM).

Nice to Haves

Trackrecord in identifying and written all types of coverage measures for corner-cases.

Planned and performed the verification of digital design blocks according to the design

specification and interacting with design engineers.

Collaborative Environment: Ability to verify Analog/mixed-signal designs in a collaborative

team environment.

Communication: Strong communication skills, including the ability to write test plans, present

results, and communicate clearly with multi-functional teams.

Quick Apply

Refine Your Search

Systemc jobs

Senior Verification Engineer

DSP Algorithms Engineer

#Virtual Platform Engineer

Staff Software Modeling Engineer

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Senior Mixed-Signal Verification Engineer

ASIC Design Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)

DV Engineers

Design Verification Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)

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Principal SoC Performance Architect – Next-Generation Server Platforms

Applications Engineer - FPGA Prototyping

Design Verification Engineer

Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development

Modeling and Simulations Specialist

Senior Architecture Modeling Engineer, AWS Machine Learning Accelerators

Senior Architect, Simulation Kernel Modelling

Staff SoC Performance Architect – Next-Generation Server Platforms

Applications Engineering Consultant - Emulation

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