Top 589 Asic/fpga engineer Jobs

FPGA/ASIC Verification Engineer
Grammar LLC —Rochester, NY
- $90,500 - $197,500 a year
- 8 hour shift
- Java
- Bachelor's degree
- Linux
- Paid holidays
- Disability insurance
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FPGA Design Verification Engineer
UST —Mountain View, CA
- $182,000 - $273,000 a year
- Mid-level
- Master's degree
- Fair chance
- Paid jury duty
- Health savings account
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ASIC Design and Integration Engineer
Apple —Beaverton, OR
- $184,700 - $324,800 a year
- Bachelor of Science
- 8 years
- Analysis skills
- Employee stock purchase plan
- Health insurance
ASIC/FPGA Senior Verification Engineer - Milwaukee, WI or Mayfield Heights, OH
Info-Ways —Milwaukee, WI
- Contract
- 5 years
- English
- Analysis skills
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Senior ASIC Physical Design Engineer
Johns Hopkins Applied Physics Laboratory (APL) —Laurel, MD
- $105,000 - $290,000 a year
- Full-time
- 6 years
- Continuous improvement
- Scripting
- Disability insurance
- Health insurance
Principal Electrical Engineer FPGA/ASIC (Remote)
Collins Aerospace —Austin, TX
- $107,500 - $204,500 a year
- Full-time
- Remote
- 8 years
- Continuous improvement
- Travel
- Paid holidays
- Loan repayment program
ASIC/FPGA Design Verification Engineer
Teradyne —North Reading, MA
- $98,700 - $157,900 a year
- Mid-level
- Office
- 3 years
- Paid holidays
- Disability insurance
Senior ASIC/FPGA Verification Engineer (Onsite)
Collins Aerospace —El Segundo, CA
- $95,500 - $181,700 a year
- Full-time
- Office
- 3 years
- Mentoring
- Paid holidays
- Loan repayment program
Senior FPGA/DSP Engineer
Joby Aviation —Santa Cruz, CA
- $132,800 - $199,300 a year
- Full-time
- Computer Science
- 5 years
- Doctor of Philosophy
- Employee stock purchase plan
- Disability insurance
ASIC/FPGA Verification Engineer III
Lockheed Martin Corporation —Denver, CO
- $101,000 - $201,365 a year
- Full-time
- Bachelor of Science
- Office
- 3 years
- Paid jury duty
- Paid holidays
Electrical Engineer II ASIC/FPGA Verification (Onsite)
Collins Aerospace —El Segundo, CA
- $75,800 - $144,200 a year
- Full-time
- Mid-level
- Office
- In-person
- Paid holidays
- Loan repayment program
ASIC Design Engineer
Qualcomm —Santa Clara, CA
- $126,700 - $190,100 a year
- 5 years
- Engineering
- Analysis skills
FPGA Firmware & Design Engineer
Qualcomm —San Diego, CA
- $164,000 - $246,000 a year
- Computer science
- Computer Science
- Engineering
FPGA Firmware Engineer / FPGA Design Engineer
Qualcomm —San Diego, CA
- $115,600 - $173,400 a year
- Computer Science
- Engineering
- Mid-level
5d
Sr Electrical Engineer - ASIC/FPGA (Onsite)
Collins Aerospace —Cedar Rapids, IA
- $86,800 - $165,200 a year
- Full-time
- 3 years
- Analysis skills
- Continuous improvement
- Paid holidays
- Loan repayment program
ASIC Design Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)
ByteDance —San Jose, CA
- $122,574 - $256,000 a year
- Multiple hires
- Computer Science
- Bachelor of Science
- Master's degree
- Paid parental leave
- Paid holidays
SLD FPGA Verification Engineer III - Lunar Permanence
Blue Origin —Seattle, WA
- $130,706.00 - $182,987.70 a year
- Full-time
- Background check
- 5 years
- Bachelor of Science
- Paid parental leave
- Paid holidays
FPGA/ASIC Design Engineer (Silicon Engineering)
SpaceX —Redmond, WA
- $125,000 - $195,000 a year
- Extended hours
- Computer science
- Computer Science
- System design
- Paid parental leave
- Employee stock purchase plan
FPGA Engineer - Level 2 - New Glenn
Blue Origin —Kent, WA
- $98,208.00 - $149,990.40 a year
- Full-time
- Background check
- Bachelor of Science
- DOT physical examination
- Paid parental leave
- Paid holidays
FPGA Design Engineer
Teradyne —Tualatin, OR
- $123,100 - $196,900 a year
- Windows
- 3 years
- Master's degree
- Paid holidays
- Disability insurance
8d

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FPGA/ASIC Verification Engineer

Grammar LLC -
Rochester, NY

Quick Apply

Job Details

Full-time
$90,500 - $197,500 a year

Benefits

Paid holidays
Disability insurance
Health insurance
Flexible spending account
Paid time off
Parental leave
Employee assistance program
401(k) matching
Flexible schedule

Qualifications

Embedded systems
FPGA
FPGA circuit design

Full Job Description

Role: FPGA/ASIC Verification Engineer

Job Schedule: 9/80: Employees work 9 out of every 14 days – totaling 80 hours worked – and have every other Friday off OR 5/8: Employees work 8 hours per day, 5 days a week

Job Description:

Join our team at the company and play a critical role in developing secure, cutting-edge tactical communication systems that protect those who protect us. As an FPGA Verification Engineer, you’ll collaborate with a talented, mission-driven team, verifying next-generation FPGA solutions for our radios used by military and first responders worldwide. This is a hands-on opportunity to grow your expertise in UVM, advanced verification methodologies, and complex communication systems—while enjoying work-life balance with flexible schedules and every other Friday off.

You will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. We're seeking familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard interfaces. You will be required to analyze requirements, create test specifications/plans, write tests in System Verilog within a UVM test bench framework, and verify designs meet requirements. You will work with cross functional teams to verify FPGA designs for radio product development projects.

Essential Functions:

Perform FPGA design verification and validation of embedded electronic communication.

Assist in development of high-level and detailed verification test plans consistent with system requirements and specifications.

Develop self-checking test benches for FPGA design verification and validation using System Verilog.

Develop Agents, Test sequences, Cover groups, Predictors, Scoreboards.

Develop randomized and directed tests to achieve closure on functional coverage and provide feedback to team to reach functional coverage goals.

Develop high-level and detailed verification test plans and test benches consistent with system requirements and specifications.

Work with cross functional teams as needed to define and verify product and design requirements.

Prepare design and implementation reviews. Present technical briefings and status to internal and external customers.

Ability to obtain and maintain US Security Clearance.

Qualifications:

Bachelor’s Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience.

Experience developing and verifying FPGA/ASIC based embedded system solutions.

Preferred Additional Skills:

Demonstrated ability to analyze and debug FPGA firmware and related hardware issues.

Working knowledge of Ethernet Standard and design experience related to Ethernet packet processing.

Experience with cryptographic algorithms and cryptographic solutions for embedded communication systems.

Experience with Mentor Graphics Verification tools.

FPGA/ASIC RTL Design experience.

Proficiency in Object Oriented Programming (C++, JAVA).

Proven proficiency in FPGA/ASIC verification using System Verilog.

Working knowledge of UVM/OVM methodology.

Experience with Advanced Functional Verification tools to report functional coverage.

Experience with scripting languages (Bash, Perl, Python, Tcl).

Familiarity in working within Linux OS.

Familiarity with industry standard interfaces (Ethernet, AXI, SPI).

Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.

Highly motivated, self-starter, who works well in team environments.

In compliance with pay transparency requirements, the salary range for this role in New York State is $90,500-$168,500. The salary range for this role in Maryland is $106,500 - $197,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. Our company also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.

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Refine Your Search

asic/fpga engineer jobs

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FPGA Design Verification Engineer

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Senior ASIC Physical Design Engineer

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ASIC/FPGA Design Verification Engineer

Senior ASIC/FPGA Verification Engineer (Onsite)

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ASIC/FPGA Verification Engineer III

Electrical Engineer II ASIC/FPGA Verification (Onsite)

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FPGA Firmware & Design Engineer

FPGA Firmware Engineer / FPGA Design Engineer

Sr Electrical Engineer - ASIC/FPGA (Onsite)

ASIC Design Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)

SLD FPGA Verification Engineer III - Lunar Permanence

FPGA/ASIC Design Engineer (Silicon Engineering)

FPGA Engineer - Level 2 - New Glenn

FPGA Design Engineer

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