-
Senior/Lead High Speed SerDes Analog IC Design Engineer
Cadence Design Systems - Columbia, MD +1 location
Interpolator; Low jitter PLL; High Speed Clock Distribution; Bias and Bandgap; and ... Position requires proficiency in using CAD tools for circuit simulation, layout, and...
from Cadence Design Systems, Inc. - 9 days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
close [ x ]- Job Summary: Senior/Lead High Speed SerDes Analog IC Design Engineer at Cadence Design Systems in Columbia, MD
- More information about jobs in Columbia, MD
-
Sr. R&D Clock and Timing Optimization Engineer
Terran Systems - Santa Clara, CA
and Timing Optimization Engineer As an R&D Clock and Timing Optimization engineer you ... Requirements Robust background in clock, timing, optimization algorithms...
from MaxHire - 30+ days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
-
CAD Front End Engineer : Perl, Shell
Fabergent - Austin, TX
team Senior Synthesis Methodology And CAD Engineer Position Information Location : ... CAD flows for logic synthesis, placement, clock tree synthesis, DFT Insertion, routing...
from iitjobs.com - 30+ days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
-
SMTS Analog Design Engineer - new
AMD - Santa Clara, CA
with Tx and Rx equalization c. Familiar with clock and data recovery circuits d. High ... Familiar with CAD tools/flows for circuit analysis (eg, IR drop, EM, ERC checker, etc) b...
from Advanced Micro Devices, Inc. - 1 day agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
-
SENIOR MIXED SIGNAL DESIGN ENGINEER
NVIDIA - Santa Clara, CA
NVIDIA is searching for a CMOS design engineer with strong analog design expertise ... and characterization of design in lab. - Coordinate closely with process and CAD...
from Nvidia - 30+ days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
close [ x ]- Job Summary: SENIOR MIXED SIGNAL DESIGN ENGINEER at NVIDIA in Santa Clara, CA
- Also found at: Monster
- More information about jobs in Santa Clara, CA
-
Senior Engineer
Samsung - Austin, TX
The Senior CAD Engineer will be responsible within the SAMSUNG AUSTIN RESEARCH CENTER ... microprocessor design environment. Develop CAD flows for timing closure on aggressive...
from Samsung - 30+ days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
close [ x ]- Job Summary: Senior Engineer at Samsung in Austin, TX
- Senior Engineer Salaries in Austin
- More information about jobs in Austin, TX
-
Engineering Assistant II/III (Electrical)
Woods Hole Oceanographic Institution - Woods Hole, MA
and netlists, the ability to use EE CAD tools, experience with and the ability to ... in both hot and cold conditions around the clock. Sea conditions will lead to active...
from Woods Hole Oceanographic Institution - 30+ days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
close [ x ]- Job Summary: Engineering Assistant II/III (Electrical) at Woods Hole Oceanographic Institution in Woods Hole, MA
- Also found at: New England HERC, Higher Education Recruitment Consortium
- More information about jobs in Woods Hole, MA
-
CPU Physical Integration Engineer
Apple - Cupertino, CA
Working with the implementation/CAD team during the entire chip design cycle to drive sign ... requirements. Participate in establishing CAD and physical design methodologies.
from Apple Inc. - 12 days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
close [ x ]- Job Summary: CPU Physical Integration Engineer at Apple in Cupertino, CA
- Also found at: Apple
- More information about jobs in Cupertino, CA
-
Engineer, Sr Principal - IC Design (Microprocessors)
Broadcom - Santa Clara, CA
standard cell based design techniques, CAD tools, and verification including noise, ... memory and/or register file design and clock tree design and distribution -...
from Broadcom Corporation - 6 days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
close [ x ]- Job Summary: Engineer, Sr Principal - IC Design (Microprocessors) at Broadcom in Santa Clara, CA
- Also found at: Broadcom
- More information about jobs in Santa Clara, CA
-
Android/Linux Software Engineer - new
Intel - Allentown, PA
- 2-D/3-D field solvers - Statistical Analysis and BER - Cadence CAD tools - Frequency domain analysis for analyzing signal integrity, as well as understanding the sources of...
from Intel Corporation - 2 days agoclose [ x ]Tired of seeing jobs from this company or website?
Sign in or create a free account to hide their jobs.close [ x ]- Report this job
- scam/spam
- expired
- duplicate
- inaccurate
-
- Full-time 13
- Internship 6
- Contract 1
