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Sr. R&D Clock and Timing Optimization Engineer
Terran Systems - Santa Clara, CA
and Timing Optimization Engineer As an R&D Clock and Timing Optimization engineer you ... Requirements Robust background in clock, timing, optimization algorithms...
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SMTS Analog Design Engineer - new
AMD - Santa Clara, CA
with Tx and Rx equalization c. Familiar with clock and data recovery circuits d. High ... Familiar with CAD tools/flows for circuit analysis (eg, IR drop, EM, ERC checker, etc) b...
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SENIOR MIXED SIGNAL DESIGN ENGINEER
NVIDIA - Santa Clara, CA
NVIDIA is searching for a CMOS design engineer with strong analog design expertise ... and characterization of design in lab. - Coordinate closely with process and CAD...
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Engineer, Sr Principal - IC Design (Microprocessors)
Broadcom - Santa Clara, CA
standard cell based design techniques, CAD tools, and verification including noise, ... memory and/or register file design and clock tree design and distribution -...
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CPU Physical Integration Engineer
Apple - Cupertino, CA
Working with the implementation/CAD team during the entire chip design cycle to drive sign ... requirements. Participate in establishing CAD and physical design methodologies.
from Apple Inc. - 12 days agoclose [ x ]Tired of seeing jobs from this company or website?
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ASIC Backend Engineer
Beyondsoft - Santa Clara, CA
vendor interface. - Knowledge of vendor CAD design tools and understanding of their ... Design knowledge & experience on power grid, clock distribution, noise reduction as well...
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Staff Analog Design Engineer ? PLL
Micrel - San Jose, CA
Principal Analog Design Engineer PLL (Clock & Timing Products) Job Responsibilities: ... with hands-on in full custom simulation, CAD-tools and high performance analog...
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Analog Engineer
Intel - Santa Clara, CA
interfaces such as QPI/DDR/PCIe, system clock, power delivery, and analog subsystems ... experience including voltage regulation, clock distribution, and power design -...
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Sr. ASIC/ Layout Design Engineer
AMD - Sunnyvale, CA
Task to include Chip level floorplanning, Bus/Pin Planning, clock tree insertion, Routing ... scripting is an asset. Working experience of CAD tools from Synopsys, Cadence and Mentor...
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Engineer, Principal - IC Design
Broadcom - Sunnyvale, CA
senior-level position (M-F 9am-6pm). Engineer, Principal IC Design. Work on ... This includes floorplan, placement, power & clock design/routing, routing (X-talk & DFM aw...
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