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ASIC Verification Engineer
- newYoh
- Santa Clara, CAteam-oriented senior networking ASIC verification engineer contractor who ... - Experience in at least one complete and successful ASIC design/verification cycle from a...
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ASIC FPGA Verification Engineer
- newKelly Services
- Santa Clara, CAJob Description: ASIC/FPGA Verification Engineer Contract Duration: 6 Months to 1 Year Det ... - Strong understanding of all phase of ASIC and/or full custom chip development is...
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Manager/Lead Asic design Engineer
- newPrincetonone
- San Jose, CAManager/Lead Asic design Engineer Reference Number: mv-aln053112 Location: 95101, US Ski ... and formal verification. - Contribute to development of effective hardware design and...
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Sr. FPGA / ASIC Verification Engineers (UVM)
Kforce Technology
- San Jose, CAFPGA/ASIC Verification Engineers. We are looking for candidates nationwide willing to ... new parts, partition and perform code development, simulation, place and route.
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Director: Storage Area Network/ Senior Software Engineering Manager
Cross Creek Systems
- San Jose, CAwith our team in Bangalore to: Manage development of new features and platform ... experience. 5+ years embedded software, development experience. 3+ years startup...
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Hardware Engineering Manager
Cross Creek Systems
- Campbell, CAThe Hardware Engineering Manager will be responsible for hardware/board/system-level aspec ... development TCP/IP and other network protocols ASIC flow and design Education:...
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Senior Product Marketing Manager
Cross Creek Systems
- Sunnyvale, CADescription This senior product marketing manager will be responsible for our ASIC ... with in depth knowledge of ASIC synthesis, ASIC design, or system applications...
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Senior Technical Marketing Manager
Cross Creek Systems
- Sunnyvale, CASenior Technical Marketing Manager The senior technical marketing manager is responsible ... Good understanding of ASIC vendor design flows and popular/standard exchange formats (Syno...
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Director of Hardware System Design
Cross Creek Systems
- Sunnyvale, CAproducts based on FPGA's and custom ASIC's (developed by another group within the ... Minimum requirements: Experienced engineer & manager, at least 10 years total.
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Verification Engineer
Protingent
- San Jose, CAStrong understanding of all phase of ASIC and/or full custom chip development is encouraged. Experience as a verification architect, establishing the verification methodology,...
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