Top 41 Perl developer rtl Jobs

MTS Digital Engineering
Rambus —Morrisville, NC
- $58,000 - $108,000 a year
- Full-time
- Hybrid work
- Bachelor of Science
- Office
- Electrical Engineering
- Employee stock purchase plan
- Health insurance
Software Engineer, Hardware Tools and Methodology - New College Grad 2026
NVIDIA —Santa Clara, CA
- $116,000 - $218,500 a year
- Full-time
- Hybrid work
- Master's degree
- C++
- Senior level
TPU RTL Design Engineer
Google —Sunnyvale, CA
- $138,000 - $198,000 a year
- Full-time
- Computer science
- Computer Science
- Master's degree
EDA Methodology Architect
NVIDIA —Austin, TX
- $168,000 - $310,500 a year
- Full-time
- Hybrid work
- Computer science
- Computer Science
- Bachelor of Science
ASIC RTL Design Engineer, Interconnect & Memory Systems
Tesla —Palo Alto, CA
- $128,000 - $312,000 a year
- Full-time
- Computer science
- Computer Science
- 3 years
- Commuter assistance
- Health savings account
RTL Design and Integration Engineer
Google —Sunnyvale, CA
- $116,000 - $166,000 a year
- Full-time
- Computer science
- Computer Science
- Mid-level
Senior Firmware Verification Engineer
Renesas Electronics —Austin, TX
- Full-time
- Remote
- 5 years
- Bachelor of Science
- Analysis skills
Quick Apply
Senior GPU Architect
NVIDIA —Austin, TX
- $184,000 - $356,500 a year
- Full-time
- Computer science
- Computer Science
- 8 years
TPU RTL Design Engineer, Cloud
Google —Sunnyvale, CA
- $138,000 - $198,000 a year
- Full-time
- Computer science
- Computer Science
- Mid-level
Integrated Circuit Design Verification Engineer
Snapchat —Washington, DC
- $147,000 - $259,000 a year
- Full-time
- Hybrid work
- English
- Office
- Master's degree
- Paid parental leave
- Health insurance
7d
System Software Engineer, Engineering Workflow Platform
NVIDIA —Santa Clara, CA
- $152,000 - $287,500 a year
- Full-time
- Computer Science
- Bachelor of Science
- Mid-level
Senior RTL Design Engineer, TPU
Google —Sunnyvale, CA
- $163,000 - $237,000 a year
- Full-time
- Computer science
- Computer Science
- Master's degree
TPU PCIe RTL Design Engineer
Google —Sunnyvale, CA
- $163,000 - $237,000 a year
- Full-time
- Computer science
- Computer Science
- 5 years
Senior ASIC Design Verification Engineer
ForwardEdge ASIC LLC —Saint Paul, MN
- $140,000 - $170,000 a year
- Full-time
- Master's degree
- Analysis skills
- Mentoring
- Health insurance
- 401(k)
Senior Software Engineer, Hardware Tools and Methodology Development
NVIDIA —Santa Clara, CA
- $136,000 - $264,500 a year
- Full-time
- Hybrid work
- Bachelor of Science
- 3 years
- C++
Verification CAD Lead
Ericsson —Austin, TX
- 8 hour shift
- Hybrid work
- Management
- CAD
- 11+ years
- Paid parental leave
- AD&D insurance
13d
Principal ASIC Design Verification Engineer
ForwardEdge ASIC LLC —Saint Paul, MN
- $200,000 - $220,000 a year
- Full-time
- Master's degree
- Analysis skills
- Mentoring
- Health insurance
- 401(k)
Prinicipal Emulation Engineer
Marvell —Santa Clara, CA
- $158,600 - $237,600 a year
- Computer Science
- 5 years
- Bachelor of Science
- Employee stock purchase plan
Senior CPU Pre-Silicon Verification Engineer
Intel —Austin, TX
- $164,470 - $311,890 a year
- Full-time
- Master's degree
- Doctor of Philosophy
- Senior level
- Health insurance
CPU Formal Verification Engineer
Intel —Hillsboro, OR
- $164,470 - $311,890 a year
- Full-time
- Hybrid work
- Research
- Master's degree
- Analysis skills
- Health insurance

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MTS Digital Engineering

Rambus -
Morrisville, NC

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Job Details

Full-time
$58,000 - $108,000 a year

Benefits

Employee stock purchase plan
Health insurance
Dental insurance
401(k) matching
Gym membership

Qualifications

Verification (System development task)
Embedded systems
Verilog
Digital circuit design
Perl
Machine learning (ML) fundamentals
Python
Product design documentation

Full Job Description

Overview

As a New College Graduate Design Engineer, the full-time position candidate will be responsible for specifying, architecting, implementing, and simulating RTL components. The individual will work closely with specification developers, digital & analog designers, and physical design teams to realize efficient and highest performance designs. The position is for DDR5 and DDR6 enterprise-class memory interface products to grow the Memory Interface Chip Business Unit.

Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

Responsibilities

Develop system Verilog RTL IP, logic, and state machines for next generation products
Perform block level design integration and block level simulations to qualify behavior
Document design implementation with descriptions and functional diagrams
Estimate and track power, performance, area (PPA) tradeoffs for RTL designs
Collaborate with design team members individually and in group meetings to track status and ensure design implementation achieves desired outcomes
Review and improve Static Timing Analysis (STA) results
Creating Verilog functional models to be used in simulations
Work closely with verification team to debug verification results
Support validation team during chip power-on and debug efforts
Perform design quality checks with CDC/RDC/LINT tools

Qualifications

BS in Electrical Engineering with 2-3 years experience, or MS in Electrical Engineering or Computer Engineering with 0-1 year of experience
Coursework: Digital Integrated Circuits, Advanced VLSI Systems, Advanced Computer Architecture, Embedded Systems, Design and Analysis of Algorithms, Fundamentals of Machine Learning
Background in Digital RTL design including standard LEC, CDC, Lint, DFT, BIST, STA tools
High aptitude with Verilog and SystemVerilog
Ability to document design techniques, test, and verification methodology.
Python/perl script development
Interface with debug, test, product, and reliability engineers for product qualification

About Rambus

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.

The US salary range for this full-time position is $58,000 to $108,000. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.

At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.

Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

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perl developer rtl jobs

MTS Digital Engineering

Software Engineer, Hardware Tools and Methodology - New College Grad 2026

TPU RTL Design Engineer

EDA Methodology Architect

ASIC RTL Design Engineer, Interconnect & Memory Systems

RTL Design and Integration Engineer

Senior Firmware Verification Engineer

Senior GPU Architect

TPU RTL Design Engineer, Cloud

Integrated Circuit Design Verification Engineer

System Software Engineer, Engineering Workflow Platform

Senior RTL Design Engineer, TPU

TPU PCIe RTL Design Engineer

Senior ASIC Design Verification Engineer

Senior Software Engineer, Hardware Tools and Methodology Development

Verification CAD Lead

Principal ASIC Design Verification Engineer

Prinicipal Emulation Engineer

Senior CPU Pre-Silicon Verification Engineer

CPU Formal Verification Engineer

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