-
ASIC Verification EngineerApech INC - Staffing Solutions - San Jose, CAASIC Verification Engineer - Principal or Staff Level Job Description: This senior level position involves design verification of ASIC modems. Responsibilities include: - Develop functional test/verification plans, verification modules, test cases, and coverage metrics - Develop verification environments and test suites for full chip and block level testing, using the latest tools and verification languages - Assist with the generation and bring-up of test vectors on the ATE - Work with system and hardware engineers to port tests to other environments, silicon bring up, and validation Required Skills: - Experience in verifying designs at top system level and block level - Strong Verilog, PERL, TCL, and C/C++ programming skills - System Verilog, Vera, E, or assertion based verification... See job listing >21 days ago from Dice - Save - Block - Flag - More Tools...
- flag this job
- scam/spam
- expired
- broken link
- duplicate
- Who do I Know at Apech INC - Staffing Solutions - by LinkedIn
- ASIC Verification Engineer Salaries in San Jose | Research Salary - at PayScale
- Local Tools: Research San Jose Jobs | Map This Job
- Find People at Apech INC - Staffing Solutions: Spoke
View on Google Maps | Yahoo! Maps | MapQuest
