1 - 10 of 93

asic dft engineer jobs near Santa Clara, CA


  • Engineering Program Manager, Silicon Debug

    Apple

    - Santa Clara, CA

    Requires at least 5+ years of experience in DFT, PD, System Integration or Product Engineering. * 1+ Years Program or Project Management, Systems Support/Customer Support exp. *...

    7 days ago from Apple Inc
  • Hardware Engineering Intern/Co-op

    Apple

    - Santa Clara, CA

    of RF Automated Systems, RF Sys Analysis ASIC / VLSI: RTL Design & Implementation, ... Integrity, Analog/Mixed Signal, LDV/HDV, DFT Embedded/Systems Development: Electrical...

    7 days ago from Apple Inc
  • ASIC Design Engineer

    NEW

    Mindteck

    - Santa Clara, CA

    contributions you will make as the next ASIC Design Engineer to join our team in ... you along the way. Apply Today! ASIC Design Engineer Summary : CW will assist the DE...

    1 day ago from Sologig
  • DFT Engineer

    NVIDIA

    - Santa Clara, CA

    MSEE/PHD preferredResponsibilities: As a DFT engineer, you will be working on cutting ... background/course work/familiarity with Asic/logic design and verification, RTL/Full...

    30+ days ago from Doostang
  • Pre-Sales Engineer (ASIC / IP / Packaging) Semiconductor Solutions

    eSilicon

    - San Jose, CA

    customer oriented, semconductor (ASIC/IP) engineering professional who will ... techniques Experienced in ASIC Design For Test (DFT) Knowledge in IP - Familiar with:...

    12 days ago from ZipRecruiter
  • ASIC Engineer Staff - DFT engineer

    Juniper Networks

    - Sunnyvale, CA

    About the Position: Looking for senior DFT engineer responsible for successful ... candidate will help in the deployment of DFT methodologies, work with the...

    12 days ago from Juniper Networks
  • Engineer, Senior ASIC Design

    Marvell

    - Santa Clara, CA

    * Hands on experience on logic synthesis, DFT insertion, low power design/verifications an ... * Performing synthesis, DFT insertion, Low power design/verifications and timing closure...

    7 days ago from Marvell
  • Engineer, Senior ASIC Design

    Results Center

    - Santa Clara, CA

    * Hands on experience on logic synthesis, DFT insertion, low power design/verifications an ... * Performing synthesis, DFT insertion, Low power design/verifications and timing closure...

    7 days ago from The Results Center
  • DFT Engineer

    Avago Technologies

    - San Jose, CA

    experience are a must. Experience in ASIC environment and ability to collaborate with ... of experience in DFT (Design For Test) • DFT concepts and implementation of ATPG, scan,...

    30+ days ago from Avago Technologies
  • ASIC Design Engineer

    Marvell

    - Santa Clara, CA

    Verilog/VHDL RTL coding Logic Synthesis ASIC integration Functional and logical ... Verification (using Conformal or equivalent) DFT insertion and Test Pattern generation...

    30+ days ago from Marvell
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