1 - 2 of 9

asic design engineer jobs near San Jose, CA


  • Engineer, ASIC Design

    Marvell

    - Santa Clara, CA

    . Develop timing constraints. . Realize the design in FPGA platform and verify the design ... cell placement, clock tree synthesis, design rule checks and post-layout timing...

    30+ days ago from Marvell
  • Engineer, ASIC Design

    Results Center

    - Santa Clara, CA

    design methodologies, understands stages of ASIC design flows, and is experienced with ... solution using state-of-the-art IC design methodologies and design flows. *...

    30+ days ago from The Results Center
Were you satisfied with these results? Yes | No
Thank you for your feedback!

Saving your search...

Your current search will be saved as: