Senior FPGA Engineer

Logicircuit, Inc. - Alpharetta, GA


COMPANY SUMMARY - Logicircuit is a supplier of safety-critical FPGA IPs and full FPGA designs for primarily the aviation industry, but also other industries in need of high integrity designs such as military, automotive, and medical. We provide design and verification services for FPGA IPs, full FPGA designs, circuit card assemblies, and including full systems. We work with a wide range of technologies, so that from one project to the next you are always learning new technologies, protocols, and new tools.

JOB SUMMARY- The Senior FPGA Engineer will be tasked with design and verification of IP, complete FPGA designs, and systems for safety-critical markets. Design work will primarily be VHDL for designs incorporating an FPGA/CPLD. Verification will be both in simulation and lab environments. FPGA debugging techniques (such as integrated logic analyzers like Xilinx’s Vivado Logic Analyzer) will also be employed.


  • Verification of IP/systems using a DO-254 based approach
  • Analysis of verification completion via code coverage metrics
  • Design/Verification of IP for safety-critical markets
  • Debugging of FPGA designs
  • Testbench development in VHDL
  • Simulation scripting/automation in TCL


  • 5+ years experience working in FPGA design and/or verification capacity
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or closely related field
  • Working knowledge of VHDL


  • Experience in a safety-critical market, preferably Aerospace
  • Knowledge of DO-254 hardware verification or DO-178 software verification
  • Experience with test equipment such as oscilloscopes, logic analyzers, and embedded test (such as Vivado Logic Analyzer)
  • Experience with both Xilinx/Intel/Microsemi FPGA design tools
  • Experience with Embedded FPGA design (Zynq or Microblaze) using Xilinx Vivado and SDK
  • Experience with TCL scripting
  • Experience with code coverage metrics (statement/branch/condition/expression/FSM)
  • Knowledge of industry best-practices for proper clock domain crossing (CDC)
  • Experience with code linting (automated checking against coding standards)
  • Knowledge of Verilog

Job Type: Full-time

Work Location:

  • One location