At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We are looking for a Sr. Principal Software Engineer to work in a team-oriented environment to develop and maintain advanced emulation and co-simulation run-time software tools and transaction-based acceleration (TBA) methodology. The engineer will work closely with development engineers to develop high performance software on Cadence emulation/prototyping platforms.
Responsibilities include development and deployment of software tools for Palladium emulation system, emulation and co-simulation run time systems and various core run time software modules for existing and future generation emulation systems.
Bachelor or Master Degree in EE/CS/CE with a minimum of 10 years of industry experience.
Candidate should be proficient with development and debugging C/C++, Operating system concepts.
Design modeling using Verilog/SV, VHDL or SysC is must
Knowledge and experience in RTL modeling of BFMs along with exposure to verification methodologies using UVM and SC/TLM and TBA is required.
EDA/CAD software tool development experience or logic and functional design verification experience is highly preferred.
Requires good communication skills, attention to details, and ability to work in multi-site/multi-person project.
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