Senior Software Development Engineer

Talence Group llc, Portland, Oregon - San Jose, CA


who our client is and what they need…

Our client is a global leader in the semiconductor industry with a worldwide community of talented engineers and designers who are keeping the world connected by providing incredible technology for smartphones, tablets, smart cars, wearable devices, laptops and other cutting-edge connectivity and computing applications. This company is publicly traded on NASDAQ and uniquely positioned to unlock innovative technology solutions by continuing to build out strong engineering teams.

You will have the opportunity to have a huge impact by playing a significant role on a small, collaborative team of 30 – 40 highly valued software development engineers. There is ample opportunity to grow and develop by driving entire projects and gaining visibility throughout the organization while maintaining a great work/life balance.

what you will do…

  • Work with a team to deliver software solutions for FPGA development with state of the art Place & Route software.
  • Collaborate with internal teams of Engineers, including front-end design engineers, QA and GUI teams across the globe to facilitate value-added solutions for the customers while enhancing product capabilities.
  • Develop high-quality software design products that will become the next generation of technology.
  • Utilize Radiant and Diamond software to improve new products.
  • Evaluate new FPGA architecture features and its impact on existing EDA tools.
  • Identify, prioritize and execute functions in the software development lifecycle.
  • Perform various benchmarking and testing tasks to improve the quality and usability of FPGA tools.
  • Automate functions by determining appropriate tools and scripting that are most effective.
  • Document all development phases and monitor systems to ensure quality assurance.
  • Review, debug code and assure design rule checking is successful.

what you need to have…

  • Domain expertise in FPGA/ASIC place and route algorithms.
  • Demonstrated experience in and knowledge of FPGA architecture, PLC, EBR, DSP, DDR, I/O, clock and routing structure.
  • Strong C++ development/debugging skills in Microsoft Visual Studio and Linux environment.
  • Knowledge of script languages such as Bash, csh, Tcl, Perl or Python would be preferred.
  • BS in CS/CE with 7 plus years of experience or an MS, or PhD in Computer Science, Computer Engineering, or related field with 5+ years of work experience in Place and Route development for ASIC/FPGA.

Job Type: Full-time


  • Software Engineering: 5 years (Preferred)


  • Bachelor's (Preferred)


  • San Jose, CA (Preferred)

Work authorization:

  • United States (Required)