Marvell - Santa Clara, CA 3.4

Perform ASIC design, implementation and verification utilizing simulation tools (VCS or Questa). Perform silicon bring up and collaborate with system engineers...

Estimated: $87,000 - $120,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Tarana Wireless - Santa Clara, CA 

Frontend design development and integration of large ASIC designs including:. The Senior ASIC Engineer will work on complex ASIC and FPGA designs for our point...

Estimated: $110,000 - $150,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Sponsored

Goke US Research Lab - Santa Clara, CA 

Engineering Director, ASIC Design*. Manage a team of logic design engineers across United States, Taiwan and China.Drive hiring activities and mentor junior...

$200,000 - $300,000 a yearSponsored

Tarana Wireless - Santa Clara, CA 

7+ years’ fulltime working experience in logic designs for FPGA or ASIC. .Providing required design documents, reviewing test results, and conducting design...

Estimated: $97,000 - $130,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

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CPACKET NETWORKS - San Jose, CA 

Candidates for this position will be expected to be able to design, implement and test both unit level modules and higher level architecture designs....

Estimated: $110,000 - $150,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

CPACKET NETWORKS - San Jose, CA 

This role will require candidates to develop and integrate the current and future RTL designs into a UVM environment....

Estimated: $110,000 - $150,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Marvell - Santa Clara, CA 3.4

O General understanding of ASIC design process. Candidate will also be exposed to various aspects of ASIC design activities, including design, verification,...

Estimated: $86,000 - $130,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Amazon.com - Cupertino, CA 3.6

Experience (4+ yrs) with ASIC design timing closure flow, methodology, timing corner definition. We are seeking experienced Physical Design Engineers to build...

Intel - Santa Clara, CA 4.1

Join the NGS group as a RTL Design Engineer, and be responsible for 5G modem micro-architecture and design, including FPGA based prototyping....

Estimated: $140,000 - $180,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Goke US Research Lab - Santa Clara, CA 

FSM, Data-Path/Control-Path Designs, etc..). Hands on Experience in Error Correcting Code (ECC) Logic Design (LDPC preferred) or DSP Logic Design is a plus....

Estimated: $80,000 - $110,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Goke US Research Lab - Santa Clara, CA 

Engineering Director, ASIC Design*. Manage a team of logic design engineers across United States, Taiwan and China.Drive hiring activities and mentor junior...

$200,000 - $300,000 a year

Google - Mountain View, CA 4.3

ASIC physical design, digital design and/or physical design flows (synthesis, place and route, STA, DFT, formal verification, CDC, and power analysis, power...

Estimated: $140,000 - $190,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Eximius Design - San Jose, CA 

Headquartered in San Jose, CA., Eximius Design is an engineering services company focused on ASIC design, FPGA design, Systems and Software engineering....

Estimated: $80,000 - $100,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Google - Sunnyvale, CA 4.3

Craft architectural specifications for ASIC designs. 3 years of ASIC digital design experience, including SystemVerilog, scripting languages and synthesis....

Estimated: $84,000 - $120,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Google - Mountain View, CA 4.3

Work cross-functionally with the ASIC design team and foundries to define a SOC package mechanical, thermal, electrical and reliability requirements....

Estimated: $82,000 - $110,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Fortinet - Sunnyvale, CA 3.8

With 7+ years of SOC ASIC design experience. Candidate must be able to work with self motivation and deliver on commitments with challenging schedules, lead...

Estimated: $130,000 - $170,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Goke US Research Lab - Santa Clara, CA 

Participate in defining functional specification with the architect and develop the design in Verilog with verification engineers....

$100,000 - $200,000 a year

Micron - Milpitas, CA 3.9

Engineers inquiring about this position should be experienced in all aspects of ASIC reliability engineering, work with ASIC design and Foundry teams to define...

Estimated: $90,000 - $130,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Google - Mountain View, CA 4.3

Experience in ASIC design flows and methodologies. Experience with ASIC design methodologies for clock domain checks, reset checks and low power design....

Estimated: $100,000 - $140,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Ambarella - Santa Clara, CA 3.3

Design integration, logic synthesize, and design optimization for timing, area and power. Knowledge of design verification, and functional coverage....

Estimated: $110,000 - $160,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Intel - Santa Clara, CA 4.1

Thoroughly understand design specs and develop verification plans for various designs. Collaborate with digital design team to debug test cases and deliver...

Estimated: $120,000 - $170,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Intel - Santa Clara, CA 4.1

Design RTL/Logic on ASIC, IP blocks or SOCs using Verilog/SystemVerilog. Implement low-power design using UPF and clock gating....

Estimated: $74,000 - $100,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Cisco - San Jose, CA 4.1

10+ years of ASIC Design Verification experience. You will collaborate closely with the design team and the hardware team to verify the ASIC in simulation, in...

Estimated: $140,000 - $190,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

S & D Engineering Solutions - Santa Clara, CA 

Provided by Dice ASIC RTL Design engineer, PCIe Gen-3/4 and Phy integration. RTL Design engineer that has strong PCIe Gen-3 or Gen-4 and Phy integration...

$110 an hourSponsored

Wipro Ltd. - Milpitas, CA 3.8

Engineer | UVM Verification. Provided by Dice Design Verification UVM Test-Bench. More than 5 to 10 years of ASIC/SoC/FPGA design and verification experience....

Estimated: $83,000 - $110,000 a year

Please note that all salary figures are approximations based upon third party submissions to SimplyHired or its affiliates. These figures are given to the SimplyHired users for the purpose of generalized comparison only. Minimum wage may differ by jurisdiction and you should consult the employer for actual salary figures.

Sponsored

A New Beginning-Genesis 2 - Santa Clara, CA 

ASIC / FPGA design verification:. Principal Design Verification Engineer FPGA, remote possible. Hands-on experience with Block level and System level tests...

$230,000 a yearSponsored