Position Overview
- We are seeking a Senior ASIC & FPGA Design Engineer to join our engineering team supporting advanced aerospace and defense programs.
- In this role, you will serve as a technical leader responsible for the architecture, design, verification, integration, and validation of high-performance FPGA-based hardware solutions.
- You will work closely with cross-functional engineering teams to translate system requirements into reliable, high-quality programmable logic designs while ensuring projects are delivered on schedule and within budget.
- The ideal candidate has strong experience in FPGA design, RTL development, digital design, verification, hardware integration, and board-level debugging, with expertise in Xilinx/AMD FPGA technologies and modern FPGA development tools.
Key Responsibilities
- Define FPGA/ASIC architecture and design specifications based on system performance, reliability, and safety requirements.
- Design, develop, and maintain RTL using VHDL, Verilog, and SystemVerilog.
- Develop synthesis, place-and-route, and timing closure strategies to ensure optimal FPGA performance.
- Create comprehensive verification plans, simulation environments, and automated testbenches using UVM, SystemC, and Python.
- Perform functional simulation, timing verification, and design validation throughout the FPGA development lifecycle.
- Lead hardware integration, Hardware-in-the-Loop (HIL) testing, board-level debugging, and system verification activities.
- Perform timing analysis, power analysis, and FPGA resource utilization optimization.
- Support FPGA implementation using Vivado, Vitis, and Vitis HLS.
- Manage source code and configuration control using GitLab or similar version control tools.
- Develop engineering documentation including design specifications, verification plans, test reports, and release documentation.
- Collaborate with Systems, Software, Hardware, Mechanical, Manufacturing, Test, and Quality Engineering teams.
- Mentor junior engineers and promote FPGA development best practices.
Required Qualifications
- Bachelor's degree in Electrical Engineering or a closely related STEM discipline from an accredited university. (Master's degree preferred.)
- Minimum 3 years of professional experience in FPGA design, development, simulation, and verification.
- Strong experience with VHDL, Verilog, and/or SystemVerilog.
- Experience with Xilinx/AMD FPGA toolsets, including Vivado, Vitis, and Vitis HLS.
- Experience using FPGA simulation tools such as Synopsys VCS.
- Strong understanding of digital design principles, including: Timing analysis, Timing closure, Clock Domain Crossing (CDC), Signal integrity
- Experience working with high-speed interfaces such as: AXI, PCIe, Ethernet, TCP/IP, Serial communication protocols
- Hands-on laboratory debugging experience using oscilloscopes, spectrum analyzers, signal generators, and related electronic test equipment.
- Familiarity with Synopsys EDA tools.
Preferred Qualifications
- Active DoD Secret or Top-Secret Security Clearance.
- Experience supporting missile or defense programs.
- Experience with the complete ASIC/FPGA development lifecycle, including architecture, design, simulation, verification, validation, integration, and testing.
- Experience with SystemVerilog, Verilog, C/C++, MATLAB, and Simulink.
- Experience with: Synopsys Synplify, Synopsys VCS, NCSim, ChipScope
- Experience with Xilinx/AMD and Microchip (MicroSemi) FPGA families and IP cores.
- Experience implementing cryptographic or NSA encryption algorithms (AES, Counter Mode).
- Experience with UVM, Simulink, and HDL Coder integration.
- Experience with FPGA board-level troubleshooting and validation.
- Experience using GitLab for configuration management.
- Knowledge of digital controls and loop-closure applications.
- Networking experience including: Ethernet switches, Routers, Firewalls, Wireshark, tcpdump
- Excellent communication, teamwork, mentoring, and presentation skills.
BI03
Pay: $50.00 - $88.99 per hour
Application Question(s):
- Candidates must have the ability to obtain a Department of Defense (DOD) Secret Security Clearance.
Education:
Experience:
- FPGA design, development, simulation, and verification: 5 years (Required)
- VHDL, Verilog, and/or SystemVerilog: 1 year (Required)
Ability to Commute:
- Grand Prairie, TX 75051 (Required)
Work Location: Hybrid remote in Grand Prairie, TX 75051
