Job Title: Senior Hardware Verification Engineer
Job Location: Austin, Texas, United States
Study Level: Bachelor's Degree
Skill Cluster: DE-API_Testing.
Primary Skill: C++
Experience: 10+ years
Job Duration: 6 Months
Job Description:Application or Product Engineering background with minimum 5 to 20 years of experience is required in HW Assisted Verification.Knowledge of FW/SW/Driver with Linux Boot bring up experience is an essential requirement.Knowledge of PCIe, HBM and JTAG/UART protocols is must.ENET protocol & testers like Virtual IXIA is plus.Skills Requirements:
- Digital design with systeme verilog RTL coding from Synthesis point of view.
- Experience with emulator ZeBu, Palladium & Veloce.
- FPGA Protyping experience with HAPS, Protium & ProFPGA is plus.
- Ability to put together emulation top level wrapper with DUT/System Level, clocks/reset & FPGA partitioning/Place & Route timing closure for successful model build.
- Knowledge of Python, C/Perl scripting is a must.
- Expertise in HW assisted Verification TestBench environment : UVM, C++/System C is desired.
- Experience integrating and bringing up PCIe Gen6 Protocol Transactor Integration with QeMu is required.
- Kernel boot, Linux Boot sequences knowledge & debug is must.
Best Regards,
Lakshmi
Email:
Google Chat: [email protected]
Linkedin: Vajrala Lakshmi
iMedhas Consulting Services | Newark, Delaware 19702
Pay: From $55.00 per hour
Work Location: Hybrid remote in Austin, TX 78701
