Job Requirements
Company: Quest Global Services-N.A., Inc.
Position Title: Sr. Technical Lead
Location: 175 Addison Rd, Entrance A, Windsor, CT 06095 and unanticipated client
locations throughout the U.S.
Position Responsibilities: Verification and Validation of FPGAs, support project execution by
reviewing engineering artifacts and ensuring verification deliverables meet design and quality
requirements by performing timely reviews of all the artifacts generated by the team(s).
Requirements Review, Verification and Validation of FPGAs. Collaborate with cross-functional
engineering teams and provide technical guidance on verification activities. Perform the
certification documentation reviews and baseline the certification plans. Create planning
documentation – Plans, PHAC, HVVP, HCMP, and HPAP. Develop Simulation test benches using
languages such as System Verilog and UVM. Create simulation test cases and procedures
document. Create Problem reports/Change Requests, co-ordinate all the problem reports/change
requests created by remote team(s) and drive them to closure. Coordinate with Change Control
Board (CCB), participate in CCB Meetings with Customer Technical Team(s) to get the change
requests/problem reports approved. Document the issues identified in requirements and design,
communicate with Customer technical team(s) and drive to closure. Communication of DO-254
certification aspects with Customer and its customers. Participate in all the technical reviews,
implement the findings, guide the team(s) on complex findings to ensure compliance to DO-254
DAL A objectives and drive to closure Participate in certification audits and compliance reviews
with customer and regulatory stakeholders., throughout the program, document the audit actions
and drive them to closure. Participate in all the daily/weekly status meetings and drive the entire
team(s) per customer/program expectations.
Position Requirements: Bachelor’s degree (or foreign equivalent) in Electronics Engineering, or a
related field, PLUS five (5) years of experience in the job offered or a related position. Experience
must include demonstrable knowledge of: System Verilog; UVM methodologies; UVM RAL
Model, ASIC/FPGA verification; RTL debugging; waveform analysis; C/C++; DPI; Python; Perl;
PCIe; SPI; I2C; Ethernet; DDR; ARINC; AMBA-AXI; AHB; VIP; HIL test setups; JTAG; logic
analyzers; Synopsys VCS; Cadence Xcelium/Incisive; Mentor QuestaSim; Git; SVN; DOORS;
JIRA; DO-254; PHAC; HVVP; HCMP, and CCB. Required knowledge may be gained prior to or
concurrently with Bachelor's degree. Travel to unanticipated client locations throughout the U.S.,
approximately 30%, as required. May telecommute from any location within the U.S.
Apply at careers.quest-global.com and reference Job Code 28290.0340
