- RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
- Verification: Create UVM constrained random environments and conduct static timing, linting, and clock-domain-crossing (CDC) analyses.
- DO-254 Certification: Create artifacts required for Airborne Electronic Hardware (AEH) DAL-A certification and participate in FAA SOI audits.
- Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing. [1]
Key Qualifications
- Experience: Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior designation).
- Education: Degree in a STEM (Science, Technology, Engineering, Mathematics) field.
- Avionics Knowledge: Familiarity with design assurance standards (DO-254) is highly preferred.
Required Skills:
- Expert‑level verification engineer with strong SystemVerilog and UVM experience or
- FPGA verification background in lab testing and/or design verification testing
- Experience with design on Xilinx products would be a strong plus
- expected to communicate effectively with emerging engineers and provide both technical and process (DO-254) guidance to the verification team.
Pay: $110,000.00 - $140,000.00 per year
Benefits:
- 401(k)
- 401(k) matching
- Dental insurance
- Health insurance
- Life insurance
- Parental leave
- Relocation assistance
- Vision insurance
Work Location: In person
