Overview
The Microsoft Azure team is seeking a Principal Software Engineer to lead the development of firmware , debugging, and validation of next-generation firmware solutions for Microsoft AI accelerators and cloud silicon platforms.
This role is focused on the architecting, development , debug and deployment of silicon firmware libraries focused on Compute Domains and ANC (Accelerator Network Controller). This will require experience in SoC architecture, low-level firmware, silicon bring-up, hardware/software co-design, and platform initialization flows. The candidate will serve as a technical leader driving IP Firmware library architecture across multiple silicon programs while collaborating with hardware architects, validation engineers, security and Platform firmware and software teams. The role needs to be technical hands on leaders who will influence architecture across teams, drive complex initiatives, and effectively communicate with executives, customers, and engineering stakeholders.
Responsibilities
Qualifications
Required Qualifications:
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Bachelor's Degree in Computer Science or related technical field AND 6+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience.
Other requirements:
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Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Preferred Qualifications:
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12–15+ years of experience in firmware, embedded systems, or SoC development.
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Experience as a technical lead for complex silicon or firmware programs.
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Demonstrated ownership of architecture, development, and delivery of production-quality firmware.
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Good Programming skills in C/C++ and Python.
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Experience in CPU and accelerator architecture, ARM/RISC architectures, On Chip Interconnect.
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Experience in designing Boot loader, Platform Initialization sequences, Silicon Abstraction layers.
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Experience in domains like Network controllers, and high-performance compute sub systems.
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Silicon bringup. Debug and experience in using JTAG , Lauterbach TRACE32 and other debug tools.
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Experience in using Emulation and FPGA ;Platforms
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Experience with Azure hardware platforms.
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Experience with AI accelerator silicon.
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Experience with confidential computing and security firmware.
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Experience working with emulation platforms (Zebu, HAPS, Palladium, Veloce).
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Experience with firmware performance optimization and telemetry.
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Experience in RAS, reliability, and serviceability architecture.
Software Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process.
