Job Overview
We are seeking a highly analytical and technical IST (Interconnect Stress Test) Test Engineer to lead the reliability and quality evaluation of our printed circuit boards (PCBs). In this role, you will be responsible for configuring, executing, and analyzing Interconnect Stress Testing (IST) methodologies to determine the long-term integrity of via barrels, multilayer interconnects, and inner-layer junctions. You will work closely with PCB manufacturing, assembly, and hardware design teams to simulate thermal cycling, accelerate the discovery of latent defects, and drive product reliability optimizations.
Key Responsibilities
- IST Execution & Configuration: Program, set up, and operate specialized IST testing equipment to apply precise thermal stress cycles via current applications on PCB test coupons.
- Data Log Analysis: Continuous monitoring of resistance variations. During thermal cycling to detect cracks, barrel separations, or internal failures.
Qualifications & Skills
- Education: Bachelor’s degree in Materials Science, Electrical Engineering, Manufacturing Engineering, or a related technical discipline.
- Root-Cause Failure Analysis: Conduct micro-sectioning and physical failure analysis on compromised test coupons to isolate design or manufacturing errors.
- Standards Compliance: Ensure all interconnect testing workflows adhere strictly to international standards, specifically IPC-TM-650 guidelines.
- Cross-Functional Collaboration: Partner with PCB fabricators, assembly technicians, and layout designers to provide data-driven recommendations that improve product survivability.
- Reporting: Document detailed thermal stress profiles, lifecycle forecasts, and failure distribution metrics for engineering stakeholders.
Pay: $80,000.00 - $90,000.00 per year
Benefits:
- 401(k)
- 401(k) matching
- Dental insurance
- Flexible schedule
- Paid time off
Work Location: In person