Design Verification Engineer Salaries in Boulder, CO

The candidate must have experience using SystemVerilog and UVM, designing verification components including UVM agents, checkers, and behavioral models.

$108,000 - $172,800 a year

Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or related field or equivalent practical experience.

A bachelor's degree in computer science, electrical engineering, or a related field. Collaborate with a cross-functional team to develop and deploy custom FPGA…

$200,000 - $300,000 a year

Select and justify hardware components and implementation techniques, connectors, power‑distribution, thermal‑management, RF front‑ends to deliver the most…

$70,100 - $123,625 a year

Work closely with firmware, electrical, and mechanical engineers to define test coverage. Support regulatory, certification, and compliance testing activities.

$80,000 - $90,000 a year

Collaborating on UI/UX design to enhance user experience (no need to be a designer, just care about good UX). Off-sites and many social events and celebrations.

$130,000 - $190,000 a year