Design Verification Engineer Salaries in Campbell, CA

Collaborate with cross-functional teams including architecture, RTL design, physical design, firmware, and validation.

$190,000 - $230,000 a year

Strong understanding of digital design, RTL, and ASIC design flows. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput…

$150,000 - $275,000 a year

Experience in SystemVerilog OVM/UVM, synthesis, mixed-signal circuit schematics design, and layout design. Contribute to micro-architecture designs for state-of…

Debugging tests with design engineers to deliver functionally correct design blocks. Closing coverage measures to identify verification holes and to show…

This role involves technical ownership and close collaboration with design, architecture, and customer teams to achieve verification closure with high quality.

$60 - $70 an hour

We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads.

$150,000 - $275,000 a year