Asic Designer Salaries in Cupertino, CA

Hands on experience in all aspects of the chip development process with proficiency in front end tools and methodologies. Integrate complex IPs into the SOC.

11 days ago

Strong in micro-architecture and RTL development (Verilog), as well as entire front-end flows including logic synthesis, power, and timing analysis.

$116,000 - $218,500 a year

In this role, you will support and develop the engineering team, as well as contribute to technical methodologies and project management.

$143,800 - $230,000 a year

Across the full front-end design cycle. State machines, pipelining, parallelism, and timing. Collaborating with fellow designers and architecture teams to…

$129,300 - $194,700 a year

This role sits between senior individual contributor and technical lead: you will personally drive RTL and micro-architecture while providing execution…

$250,000 - $280,000 a year

RFIC design experience: LNA, mixer, PA driver, Broadband amplifiers, RF front-end modules. Produce detailed design documentation and present technical progress…