Verification Engineer Salaries in Portland, OR

As a member of our physical design team, you will perform various types of physical verification checks such as LVS, DRC, design-for-manufacturing & design-for-…

$129,300 - $194,700 a year

Skilled in building SVTB/SV UVM/OVM based verification environments and using industry standard HDL languages (e.g., System Verilog) and simulation tools.

$118,500 - $177,500 a year

Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure.

$122,440 - $232,190 a year

11 days ago

Develop and document formal verification test plans and conduct technical reviews with design and architecture teams. Shift 1 (United States of America).

$164,470 - $311,890 a year

Proven track record leading and managing technical teams, ideally cross-functional groups with both design and hardware engineering backgrounds.

$166,000 - $249,000 a year

Regression test development, monitoring, debug/triage, and correction to test environment, sequences, debug of controller RTL design.

$87,500 - $162,500 a year