Asic Designer Salaries in Santa Clara, CA

Hands on experience in all aspects of the chip development process with proficiency in front end tools and methodologies. Imagine what you could do here.

11 days ago

Strong in micro-architecture and RTL development (Verilog), as well as entire front-end flows including logic synthesis, power, and timing analysis.

$116,000 - $218,500 a year

Across the full front-end design cycle. State machines, pipelining, parallelism, and timing. Collaborating with fellow designers and architecture teams to…

$129,300 - $194,700 a year

Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent…

$114,000 - $172,000 a year

Collaborate with our senior team to design and develop programs and libraries for new products. Nextest engineering teams are characterized by deep technical…

$177,900 - $277,400 a year

Responsibilities · Packet buffering, queuing, and scheduling: Work on micro architecture and design implementation of high-speed networking ASIC’s, focusing on…