Verification Engineer Salaries in Sunnyvale, CA

Understand design behavior from specifications, RTL, and discussions with design teams. Passion for formal verification, digital design, computer architecture,…

$100,000 - $189,750 a year

Exposure to design and verification tools (VCS or equivalent simulator tools; debug tools like Verdi, Debussy, GDB). Expertise in System Verilog and Verilog.

$100,000 - $189,750 a year

Develop the verification infrastructure using state of the art verification methodologies and tools. You are encouraged to understand the design and its…

$100,000 - $189,750 a year

Bachelor’s / Master’s degree (preferably computer science or a related field). Design and develop automated tests and testing strategies.

Strong knowledge of electrical systems design principles including control systems, circuit design, and electronics engineering best practices.

$80,000 - $150,000 a year

6 days ago

Teaming up with the design and micro-architecture teams to understand the functional and performance goals of the design. Ensuring the quality of the SOC.

$129,300 - $194,700 a year

3 days ago