US Citizens only who CAN OBTAIN OR ALREADY possess an Active DoD Security Clearance or above only, no exceptions
I will get you an interview, so;
Would you please call 860 889 4141 until 8PM ET 7 days a week as you can take notes & after you email a word doc resume to me -
[email protected]
GRAZIE
Joe
US Citizens only, every 2nd Friday so several 3/4 day weekends, paid long holidays, several weeks vacation
We need FPGA Engineer experts, US Citizens only, Defense industry experience would be great
Please attempt to review most of this page as several people are needed, several levels of experience
5+ Gbps serial links, CAN, OpenVPX, and PIC-SIG standards.
Ability to drive, understand and adhere to product roadmaps, define new platforms, and extend products
Ability to perform electronic circuit design (create schematic symbols and layout footprints, design schematic and layout, & create BOM).
Ability to prepare test reports, conclude the outcome of test results, provide the next steps in test plan, and present it to management level.
Ability to work in a team environment and on several projects simultaneously.
Actively expose high level risks & communicate the risk trade space & mitigation strategies to team
analyze requirements, create FPGA specifications/development plans, create FPGA verification/test plans
analyze system requirements and architect FPGA based processing solutions based on requirements the latest FPGA digital technology.
Architect hardware systems with digital, analog, mechanical components.
Architect, Implement, and verify complex algorithms in FPGAs and Software
architecture definition, design and debug of FPGA and associated hardware and microcontroller products
Artificial Intelligence, Blockchain, AR/VR, Cloud Native and Quantum Physics
ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D and D/A interfaces communication protocols, state machines, timer chains, etc. used in Electronic Safe and Arm Devices (Fuzes) DOD weapon systems.
Broad experience in embedded system design and solutions for communications systems.
C/C++, Python, Perl or scripting
code firmware designs in VHDL, code test benches in System Verilog, and verify designs meet requirements.
Communicates within and outside own function to explain and gains cooperation on policies and practices.
Competitive benefits, including 401k matching, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more
Conduct and mentor board-level circuit design, integration, verification, and documentation.
Conduct design reviews and follow standard processes.
Contribute to product design and development, including technical improvements.
create the next generation fuzing solutions.
cyber, RF, undersea, interstellar
deep ASIC Engineering and broad Engineering technical expertise, ASIC industry recognition in defense and commercial applications
Design analysis including modeling and simulation.
design, verify and test modem/signal processing-based FPGA firmware for radio communication systems.
Develop self-checking test benches for FPGA design verification and validation using SystemVerilog.
developing ASICS with 100,000,000 gates/transistors or more.
Developing C# source code targeting enhanced Flash Microcontrollers.
Developing Verilog HDL targeting Antifuse and enhanced Flash FPGA’s.
development of high-level & detailed verification test plans consistent with system requirements & specifications
digital design and verification engineers to support our development of tactical communication products.
Digital Design practices and principles, logic design and architecture and experience with HDL’s (i.e Verilog, VHDL).
Ensures a cohesive team and trust within the ASIC and Hardware Engineering Organization.
Evaluate customer/project requirements and select appropriate topologies for DC/AC and DC/DC applications.
Experience developing and verifying FPGA/ASIC based embedded system solutions.
Experience implementing complex modem and/or DSP circuits in programmable logic using FPGA devices. Equivalent experience in ASIC design is also applicable.
Experience in communication system signal processing theory and waveform design
Experience in FPGA/ASIC development using VHDL or Verilog
Experience in FPGA/ASIC verification using SystemVerilog
experience in hands-on ASIC Engineering and Signal Processing Design, Development, Test, and Manufacturing
experience in military GPS and Position Navigation and Timing (PNT) technology or other RF hardware designs.
Experience using soft/hard IP cores in FPGAs/ASICs ex Zynq or Microblaze or RISC processors, memories, flash/NVM)
Experience using VHDL RTL Coding (for design and/or analysis of digital circuits)
Experience utilizing Verilog/System and Verilog test bench development
Experience w Software Configuration Management (SCM) tools such as SVN (Subversion), GIT Bitbucket, etc.
Experience with FPGA Design, synthesis, P&R tools (ex Vivado, Quartus)
Experience with FPGA Vendor Specific FPGA Implementation tools (Vivado/Quartus/Libero)
Experience with integrating FPGA firmware on hardware
Experience with lab tools: Logic Analyzers, oscilloscopes, JTAG/ICE debuggers and protocol analyzers.
Experience with MatLab, Simulink or similar digital signal processing (DSP) modelling tools
Experience with mechanical designs incorporating complex electronics assemblies.
Experience with power electronics test equipment DC/AC electronics load, DC/AC power sources, current voltage probes.
Experience with TCL or Python scripting languages
Experience with Universal Verification Methodology (UVM)
Experience with Verilog RTL Coding
Experience working a Team/Program Lead Role: Technical lead of talented and experienced team of Digital, Analog, Power Electronics, Mechanical and Test Engineers.
Experience working in a Linux based development environment
Experience working with Linux/Windows OS
Familiar working with code version control repository tools, such as Subversion (SVN), GIT or TFS.
Familiarity with Mentor Graphics OrCAD PSPICE, LT Spice, Mathcad, Microsoft Office, and Microsoft Visio.
FPGA design engineers with emphasis on FPGA or ASIC design, development and verification using SystemVerilog, Verilog or VHDL.
FPGA developer/verification role, working in a cross functional team environment
FPGA verification tools (Mentor Questa, Visualizer)
Gigahertz microprocessors, FPGA, CPLD, DDR4 memory, flash memory, and high-density interconnect technologies.
Gigahertz microprocessors, FPGA, CPLD, DDR4 memory, flash memory, and high-density interconnect technologies.
High frequency magnetics design knowledge.
Knowledge of 5+ Gbps serial links, CAN, OpenVPX, and PIC-SIG standards.
Knowledge of ASIC implementation methods/tools (synthesis, physical layout - Cadence/Synopsys)
Knowledge of design simulation tools (Mentor, Cadence, Synopsys - 1 or more)
Knowledge of formal verification tools
Knowledge of semiconductor manufacturing processes
Knowledge using SystemVerilog for verification with AVM, VMM, OVM, or UVM a plus.
Knowledge using Verilog for Logic Design.
Lead projects with significant risks and resource requirements.
Maintain expertise in semiconductor processors, System-on-Chip, and FPGA architectures.
Makes substantial improvements to processes, systems, and solutions.
Microsemi / Actel is our targeted FPGA and QuestaSim is our simulation tool.
Optimize designs with an eye toward efficiency, density, and cost.
Participate in hardware, firmware and software design trade studies, reviews, and proposals.
Plan and execute operations with autonomy under established policies.
Plan, conduct, and oversee Root Cause Analysis for products under development as well as existing product lines
Prepare design and implementation reviews. Present technical briefings and status to internal and external customers.
Programming experience in C for embedded systems, including development of algorithms, manipulation of data structures, and implementing highly optimized code.
Proven history of architecting complex analog and digital hardware.
Provides overall hands-on technical expertise in ASIC and Hardware Engineering for NS programs.
requirements analysis, use case scenarios, conceptual design, trade studies, test, operation
Research oriented work, alongside award winning teams developing practical solutions for our nation’s security
responsible for and provide senior hands-on expert level in hardware and ASIC on multiple programs.
responsible for architecture, design and development of next generation Electronic Safe and Arm Devices
RTL development using VHDL, as well as FPGA verification methodologies using System Verilog
Solid technical writing skills/ability to communicate technical concepts/solutions both inside/outside
Strong knowledge of digital, analog and power electronic circuits design, test, and debugging.
Strong oral/written communication
Strong technical writing and communication skills.
supporting both FPGA development and hardware reverse engineering efforts.
technology insertion/acoustic sensors/signal processing/combat systems/torpedoes/cyber security/knowledge management/electronic warfare.
Verilog FPGA design, System Verilog UVM verification and C# based microcontroller development.
Work with Program Engineering Functional Leader to modify procedures and practices to meet quality, volume, timeliness standards.
Working knowledge and experience in implementation and testing of MODEM RF Designs
Job Type: Full-time
Pay: $90,000.00 - $335,000.00 per year
Benefits:
- 401(k)
- 401(k) matching
- Dental insurance
- Employee assistance program
- Employee discount
- Flexible schedule
- Flexible spending account
- Health insurance
- Health savings account
- Life insurance
- Paid time off
- Parental leave
- Professional development assistance
- Referral program
- Relocation assistance
- Retirement plan
- Tuition reimbursement
- Vision insurance
Work Location: Remote
