CPU Formal Verification Engineer
Intel —Hillsboro, OR
- $164,470 - $311,890 a year
- Full-time
- Hybrid work
- Research
- Master's degree
- Analysis skills
- Health insurance
Mid-level Physical Design Engineer CPU
Intel —Hillsboro, OR
- $122,440 - $232,190 a year
- Full-time
- Mid-level
- 3 years
- Master's degree
- Health insurance
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Junior Physical Design Engineer (CPU)
Intel —Hillsboro, OR
- $105,650 - $172,860 a year
- Full-time
- Master's degree
- Electrical Engineering
- Python
- Health insurance
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Senior Physical Design Engineer (CPU)
Intel —Hillsboro, OR
- $141,910 - $269,100 a year
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- Master's degree
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- Health insurance
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CPU Cache Microarchitect/RTL Engineer
Apple —Beaverton, OR
- $184,700 - $324,800 a year
- Bachelor of Science
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- Bachelor's degree
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CPU Design Timing Engineer
Apple —Beaverton, OR
- $184,700 - $324,800 a year
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- Bachelor of Science
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- Employee stock purchase plan
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CPU Physical Design Engineer
Apple —Beaverton, OR
- $184,700 - $324,800 a year
- CAD
- Bachelor of Science
- Bachelor's degree
- Employee stock purchase plan
- Health insurance
CPU Full-chip Physical Integration Engineer
Apple —Beaverton, OR
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CPU Microarchitect/RTL Engineer - Execution, Load/Store
Apple —Beaverton, OR
- $184,700 - $324,800 a year
- Bachelor of Science
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- Employee stock purchase plan
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CPU Power Management Microarchitect/RTL Engineer
Apple —Beaverton, OR
- $184,700 - $324,800 a year
- Bachelor of Science
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CPU Microarchitect/RTL Engineer - Fetch, Out of Order
Apple —Beaverton, OR
- $184,700 - $324,800 a year
- Bachelor of Science
- Research
- Bachelor's degree
- Employee stock purchase plan
- Health insurance

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Mid-level Physical Design Engineer CPU
Intel —Hillsboro, OR
Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure.
$122,440 - $232,190 a year
8d

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cpu formal verification engineer jobs near hillsboro, or

CPU Formal Verification Engineer

Intel -
Hillsboro, OR

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Job Details

Full-time
$164,470 - $311,890 a year

Benefits

Health insurance

Qualifications

Research

Full Job Description

Job Details:

Job Description:

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Role Impact:
As a Formal Verification Engineer, you will play a pivotal role in ensuring the quality and reliability of Intel's cutting-edge CPU technologies. Working as part of the CPU team, you will leverage formal verification methodologies to develop, implement, and validate the next generation of high-performance CPUs that power a variety of innovative devices, from laptops to AI and machine learning systems. In this role, you will directly impact Intel's ability to deliver world-class products that enrich the lives of people across the globe. Join us and help engineer the future at Intel.

Key Responsibilities:

Own the formal verification of microarchitecture blocks, methodologies, and critical aspects of CPU designs.
Develop comprehensive formal verification strategies, plans, and proofs aligned with microarchitecture specifications.
Create abstraction models to simplify design complexity and ensure convergence on validation.
Collaborate with architects, RTL developers, and physical design teams to enhance verification efficiency.
Analyze, debug, and resolve issues identified during verification, documenting findings and corrective actions.
Develop and document formal verification test plans and conduct technical reviews with design and architecture teams.
Maintain and innovate formal verification infrastructure and methodologies to streamline development.
Mentor junior engineers and contribute to the growth of technical expertise within the team.
Support post-silicon failure debug and resolution efforts when required.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:

Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field with 8+ years of relevant experience listed below, or a Master's degree with 6+ years of relevant experience listed below, or a PhD with 4+ years of experience listed below.

Experience in 3 or more the following areas:

Proficiency in formal verification, including the use of industry-standard tools such as JasperGold, Questa Formal, or VC Formal.
Strong understanding of computer architecture fundamentals, microarchitecture, and memory systems.
Hands-on experience with hardware modeling languages, including System Verilog or Verilog.
Proficiency in scripting or programming languages such as Python, Perl, C/C++, or TCL.
Experience in assertion writing, coverage analysis, and failure debugging.

Preferred Qualifications:

Familiarity with x86 architecture, ISA, and system architecture.
Experience with post-silicon validation and debugging.
Demonstrated technical innovation through research publications, patents, or advanced validation methods.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, Austin

Business group:

Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .

Annual Salary Range for jobs which could be performed in the US: $164,470.00-311,890.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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cpu formal verification engineer jobs in hillsboro, or

CPU Formal Verification Engineer

Mid-level Physical Design Engineer CPU

Junior Physical Design Engineer (CPU)

Senior Physical Design Engineer (CPU)

CPU Cache Microarchitect/RTL Engineer

CPU Design Timing Engineer

CPU Physical Design Engineer

CPU Full-chip Physical Integration Engineer

CPU Microarchitect/RTL Engineer - Execution, Load/Store

CPU Power Management Microarchitect/RTL Engineer

CPU Microarchitect/RTL Engineer - Fetch, Out of Order

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