Top 3731 Lead field engineer drives Jobs in Remote

Lead ASIC DFT Engineer
Cyient —Remote
- From $100 an hour
- Full-time
- Remote
- Analysis skills
- Mentoring
- Senior level
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Lead Field Service Engineer - Drives
GE Vernova —Remote
- $78,800 - $131,200 a year
- Extended hours
- Remote
- Construction site
- Computer literacy
- Pass drug screening
- Paid parental leave
- Paid holidays
10d
Field Service Engineer - Medical Imaging (Northwest)
Philips —Remote
- $42 - $73 an hour
- Full-time
- Hospital
- Mid-level
- Office
- Health savings account
- Employee stock purchase plan
Data Center Strategic Sourcing Lead
Anthropic —Remote
- $365,000 - $435,000 a year
- Hybrid work
- 5 years
- Office
- Bachelor's degree
- Parental leave
- Flexible schedule
Field Service Engineer - Philadelphia
Sciton —Remote
- $100,000 - $110,000 a year
- Part-time
- Mid-level
- Associate's degree
- 2 years
- Profit sharing
- 401(k) matching
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Field Service Engineer - Atlanta
Sciton —Remote
- $100,000 - $110,000 a year
- Part-time
- Mid-level
- Associate's degree
- 2 years
- Profit sharing
- 401(k) matching
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Field Service Engineer
AMETEK, Inc. —Remote
- $90,000 - $110,000 a year
- Up to 50% travel
- Military
- English
Lead Field PLC Engineer
Divcon Controls —Remote
- Full-time
- Up to 50% travel
- Ability to walk for extended periods
- Ability to climb stairs
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Field Electrical Engineer
Parsons —Remote
- $63,600 - $111,300 a year
- Holidays
- Remote
- Microsoft Excel
- Microsoft Outlook
- Up to 50% travel
- Wellness program
- Paid holidays
Data Center Design Execution Lead
Anthropic —Remote
- $320,000 - $405,000 a year
- Hybrid work
- Bachelor of Science
- Office
- Continuous improvement
- Parental leave
- Flexible schedule
Solutions Engineer
Render —Remote
- $230,000 - $300,000 a year
- Full-time
- Remote
- Mid-level
- 8 years
- AWS
- Commuter assistance
- Paid parental leave
Sr. Field Service Engineer
Veeco —Remote
- $89,705 - $113,626 a year
- Hybrid work
- Microsoft Excel
- Microsoft Outlook
- Engineering
- Commuter assistance
- Employee stock purchase plan
Field Service Engineer - Colorado
Agfa —Remote
- Hospital
- 5 years
- Mid-level
- Health insurance
- Paid time off
Lead Platform Engineer
Koalafi —Remote
- $174,000 - $236,000 a year
- On call
- Remote
- 7 years
- Supervising experience
- Mentoring
- Commuter assistance
- Paid holidays
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Field Service Engineer
Boston Dynamics —Remote
- Mid-level
- Windows
- Travel
Field Service Engineer - VA
Agfa —Remote
- Hospital
- 5 years
- Mid-level
Lead Deployment Engineer
Mashgin —Remote
- $112,000 - $130,000 a year
- Full-time
- Remote
- Bachelor's degree
- Travel
- Mentoring
- Health insurance
- Dental insurance
Field Service Technician/Engineer
Paper Converting Machine Company —Remote
- $70,000 - $100,000 a year
- Full-time
- Background check
- 18 years or older
- Up to 50% travel
Lead Learning Architect - AI Enablement
Indeed —Remote
- $88,000 - $185,000 a year
- Full-time
- 3 years
- Military encouraged
- In-person
- Paid parental leave
- Paid holidays
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2d
Field Applications Engineer III, IV, or V
Brewer Science, Inc. —Remote
- Online Application
- Remote
- Mid-level
- Master's degree
- Product management
- Disability insurance
- Health insurance

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Lead ASIC DFT Engineer

Cyient -
Remote

Quick Apply

Job Details

Full-time | Contract
From $100 an hour

Qualifications

Engineering development testing
Electronics functional testing
Integrated circuits (ICs)
Analysis skills
SoC
Digital circuit design
Product development
System architecture design
Simulation tools
Test analysis
Python
Debugging
Cross-functional communication

Full Job Description

Experience

Role Summary

We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.

The ideal candidate will have strong hands-on expertise in DFT fundamentals, fault models, test coverage, diagnosis, and debug, as well as the ability to evaluate and adopt emerging DFT methodologies and architecture schemes to improve robustness, quality, and yield.

Key Responsibilities

Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
Act as a technical escalation point for advanced DFT and post-silicon debug issues.
Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.

Required Skills & Qualifications

Strong hands-on experience in ASIC DFT with end-to-end ownership.
Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.
Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.
Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.
Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.
Experience with MBIST implementation and verification; SMS experience preferred.
Experience with scan architecture and scan chain stitching; Tessent/SSN experience preferred.
Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and physical design implementation.
Proven post-silicon debug and silicon bring-up experience.
Exposure to large SoC designs, hierarchical DFT flows, and multi-domain integration challenges.
Strong communication skills and the ability to work independently with minimal ramp-up.

Preferred Experience

MBIST post-silicon validation.
ATPG simulations and fault coverage debug.
DFT RTL, DFD, DFT verification, and IP-level DFT integration.
DFT SDC creation and DFT timing closure support.
Boundary scan, iJTAG, SSN, and design-for-debug methodologies.
TCL/PERL scripting for DFT automation, reporting, and debug.
Experience working across multiple ASIC technology nodes and complex product development cycles.
Familiarity with yield learning, diagnosis, and manufacturing test optimization.

Pay: From $100.00 per hour

Work Location: Remote

Quick Apply

Refine Your Search

lead field engineer drives jobs in remote

Lead ASIC DFT Engineer

Lead Field Service Engineer - Drives

Field Service Engineer - Medical Imaging (Northwest)

Data Center Strategic Sourcing Lead

Field Service Engineer - Philadelphia

Field Service Engineer - Atlanta

Field Service Engineer

Lead Field PLC Engineer

Field Electrical Engineer

Data Center Design Execution Lead

Solutions Engineer

Sr. Field Service Engineer

Field Service Engineer - Colorado

Lead Platform Engineer

Field Service Engineer

Field Service Engineer - VA

Lead Deployment Engineer

Field Service Technician/Engineer

Lead Learning Architect - AI Enablement

Field Applications Engineer III, IV, or V

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