Top 472 Configuration engineer Jobs in Mesa, Az

Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $135,396 - $150,205 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
Network Security Admin / Engineer
Vaco by Highspring —Tempe, AZ
- $50 - $55 an hour
- Weekends as needed
- Mid-level
- AWS
- 2 years
- Health insurance
- Dental insurance
Quick Apply
Network / System Engineer III
Experis —Chandler, AZ
- Contract
- Hybrid work
- 5 years
- APIs
- Senior level
- Health savings account
- Disability insurance
Quick Apply
17h
HSM Engineer
Experis —Chandler, AZ
- $50 an hour
- Contract
- Maintenance
- Mid-level
- 3 years
Quick Apply
Microsoft Modern Work Engineer (Copilot & SharePoint)
Emergent Software —Phoenix, AZ
- $110,000 - $140,000 a year
- Overtime
- Remote
- Presentation skills
- SharePoint
- Senior level
- Profit sharing
- Paid parental leave
Quick Apply
Engineering Technician
Viasat, Inc. —Tempe, AZ
- $32.21 - $60.34 an hour
- Online Application
- 5 years
- Mid-level
- Microsoft Office
Systems Engineer Co-op - Fall 2026
RoviSys Building Technologies —Tempe, AZ
- $24 an hour
- Part-time
- System design
- Assembly
- US work authorization
Data Center Production Operations Engineer
Meta —Mesa, AZ
- $83,990 - $130,000 a year
- Mid-level
- Fair chance
- 2 years
Technical Support Engineer III
Iridium Satellite, LLC —Tempe, AZ
- $83,000 - $108,000 a year
- Full-time
- Hybrid work
- Microsoft Excel
- 5 years
- Office
- Paid parental leave
- Paid holidays
11h
Site Engineer I
Digital Realty —Chandler, AZ
- Full-time
- Microsoft Excel
- Microsoft Outlook
- Ability to lift 50 pounds
11h
Senior Help Desk Engineer
Kestra Financial —Tempe, AZ
- Full-time
- Microsoft Outlook
- Research
- Mid-level
- Health insurance
- 401(k)
Quick Apply
7d
Site IT Engineer, Manufacturing Operations
Nextpower —Mesa, AZ
- Full-time
- 5 years
- Mid-level
- Windows
Network Engineer
City of Tempe Arizona —Tempe, AZ
- $89,600 - $132,100 a year
- 8 hour shift
- Mid-level
- Driver's License
- Associate's degree
- Wellness program
- Paid holidays
Senior Embedded Platform / Multicore Performance Engineer
Quest Defense Systems & Solutions, Inc. —Tempe, AZ
- $150,000 - $170,000 a year
- Hybrid work
- Computer Science
- Master's degree
- Analysis skills
- Disability insurance
- Health insurance
10d
Symitar Engineer I, II, III, Senior
Global Credit Union —Glendale, AZ
- $63,233 - $152,718 a year
- 8 hour shift
- Mid-level
- Trade school
- Experience equivalent to degree accepted
- Health savings account
- Paid holidays
System Engineer
Myriad Consulting Services, Inc. —Mesa, AZ
- $45,000 - $75,000 a year
- Email
- Mid-level
- Windows
- Travel
- Health insurance
- Paid time off
Quick Apply
1d
Software Verification Engineer
Quest Defense Systems & Solutions, Inc. —Phoenix, AZ
- $130,000 - $142,000 a year
- Remote
- 5 years
- Laboratory experience
- Mid-level
- Disability insurance
- Health insurance
1d
Data Center Network Engineer
Radius DC —Phoenix, AZ
- $100,000 - $120,000 a year
- On call
- Hybrid work
- Mid-level
- Office
- Travel
- Paid holidays
- Dental insurance
Quick Apply
18h
IT Support Engineer L1
Brenntag North America LLC —Chandler, AZ
- Full-time
- Computer science
- Microsoft Outlook
- Computer Science
- Paid parental leave
- Health insurance
Quick Apply
Sr Infrastructure Engineer I
American Express —Phoenix, AZ
- $123,000 - $215,250 a year
- Full-time
- Hybrid work
- Azure
- Computer Science
- DevOps
- Paid parental leave
- Health insurance
7d

I want to receive the latest job alert for configuration engineer in mesa, az

By signing in to your account, you agree to SimplyHired's Terms of Service and consent to our Cookie and Privacy Policy.

Explore jobs in more locations

configuration engineer jobs near mesa, az

Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions

General Dynamics Mission Systems, Inc -
Scottsdale, AZ

Apply Now

Job Details

Full-time
$135,396 - $150,205 a year

Qualifications

Verification (System development task)
Metrics Reporting
Technical report writing
Debugging
Test Planning (Quality assurance practices)

Full Job Description

Basic Qualifications :

Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.

CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Responsibilities for this Position:

What You'll Do

Take ownership, lead, develop and maintain UVM-based and non-UVM-based verification environments for complex FPGA designs including cryptographic engines, protocol interfaces, and system-level integration testbenches
Create comprehensive verification plans with functional coverage models, coverage goals, and closure criteria aligned to design specifications
Implement constrained-random stimulus generators, monitors, scoreboards, and functional coverage collectors using SystemVerilog, VHDL and UVM
Drive code coverage (statement, branch, condition, expression, toggle) and functional coverage to closure, analyzing coverage holes and developing targeted stimulus to fill gaps
Develop and maintain automated simulation regression suites that run across multiple test configurations and random seeds
- including nightly regression runs, coverage trend tracking, and automated results reporting using Jenkins, GitLab CI, or similar platforms
Perform assertion-based verification (ABV) using SystemVerilog Assertions (SVA) to capture protocol rules, interface contracts, and design invariants
Debug complex design issues using waveform analysis (QuestaSim, Vivado), assertion failures, and coverage-driven investigation
Collaborate closely with FPGA design engineers during architecture definition to ensure designs are verification-friendly and observable
Review and contribute to design specifications, interface control documents, and verification closure reports
Mentor junior verification engineers on UVM methodology, coverage-driven verification practices, and debugging techniques
Support formal verification activities including property checking, connectivity verification, and equivalence checking where applicable

Required Qualifications

Strong proficiency in SystemVerilog for verification, VHDL for verification including constrained-random stimulus, functional coverage, and assertions
Hands-on experience with UVM (Universal Verification Methodology) including environment architecture, component development, and sequence libraries
Experience with industry-standard simulation tools: QuestaSim/ModelSim Simulators
Demonstrated ability to develop verification plans, define coverage models, and drive coverage to closure
Experience with code coverage metrics (statement, branch, condition, expression, toggle) and coverage analysis workflows
Proficiency in VHDL and/or Verilog for reading and understanding design RTL
Experience with waveform debugging and signal-level analysis
Understanding of AXI-Stream, AXI4, and similar on-chip bus protocols from a verification perspective
Knowledge of clock domain crossing (CDC) verification concepts and metastability analysis
Strong written and verbal communication skills for verification plans, coverage reports, and technical presentations
S. Citizenship and ability to obtain/maintain a Secret security clearance

Preferred Qualifications

Experience verifying cryptographic hardware implementations (AES, GCM, SHA, ECC, RSA, or similar)
- including automated regression management, seed management, and coverage merging
Proficiency in scripting languages (Python, Tcl, Bash, Perl) for verification automation, log parsing, and results analysis
Experience with Xilinx Vivado Design Suite and FPGA-specific verification challenges (timing simulation, post-synthesis/post-route verification)
Knowledge of CDC analysis tools (Questa CDC) and lint/design rule checking tools
Experience with emulation or prototyping platforms for hardware-in-the-loop verification
Knowledge of AXI protocol specification and Questa verification IP (QVIP) usage for protocol compliance checking
Experience with version control (Git), code review processes, and collaborative development workflows

Salary Note: This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled. Combined Salary Range: USD $135,396.00 - USD $150,205.00 /Yr. Company Overview:

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

Apply Now

Refine Your Search

configuration engineer jobs in mesa, az

Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions

Network Security Admin / Engineer

Network / System Engineer III

HSM Engineer

Microsoft Modern Work Engineer (Copilot & SharePoint)

Engineering Technician

Systems Engineer Co-op - Fall 2026

Data Center Production Operations Engineer

Technical Support Engineer III

Site Engineer I

Senior Help Desk Engineer

Site IT Engineer, Manufacturing Operations

Network Engineer

Senior Embedded Platform / Multicore Performance Engineer

Symitar Engineer I, II, III, Senior

System Engineer

Software Verification Engineer

Data Center Network Engineer

IT Support Engineer L1

Sr Infrastructure Engineer I

I want to receive the latest job alert for configuration engineer in mesa, az

Related Searches

Explore jobs in more locations

What You'll Do

Required Qualifications

Preferred Qualifications

Job Seeker Tools

Employer Tools

Browse

Stay Connected