Top 35 Dsp engineer Jobs in Orange County Ca

Digital Design Engineer
Marvell —Irvine, CA
- $97,700 - $144,410 a year
- Full-time
- Mid-level
- 1 year
- Communication skills
- Employee stock purchase plan
RTL Design Engineer (Silicon Engineering)
SpaceX —Irvine, CA
- $125,000 - $195,000 a year
- Extended hours
- Computer science
- Computer Science
- Mid-level
- Paid parental leave
- Employee stock purchase plan
Digital Design Engineer
Phizenix —Irvine, CA
- $180,000 - $250,000 a year
- Bachelor of Science
- Senior level
- Electrical Engineering
5d
Senior Comms DSP Engineer
Anduril Industries —Costa Mesa, CA
- $191,000 - $253,000 a year
- Email
- 7 years
- Management
- Laboratory experience
Quick Apply
Senior Radar DSP Systems Engineer, EW
Anduril Industries —Costa Mesa, CA
- $191,000 - $253,000 a year
- Email
- Management
- System design
- Master's degree
Quick Apply
Sr. Embedded Software Engineer - Radar & DSP
Mach Industries —Huntington Beach, CA
- $165,000 - $220,000 a year
- Full-time
- 5 years
- Math
- US work authorization
- Retirement plan
Staff ASIC Design Engineer
Celero Communications, Inc. —Irvine, CA
- $150,000 - $250,000 a year
- 5 years
- Senior level
- Electrical Engineering
Electrical Engineer- - RF Electronics, PCBA
L3Harris Technologies —Yorba Linda, CA
- $92,500 - $171,500 a year
- 10 hour shift
- Bachelor's degree
- Travel
- Senior level
- Paid holidays
- Disability insurance
Senior Staff Digital Design Engineer
Marvell —Irvine, CA
- $135,900 - $201,130 a year
- Computer Science
- 3 years
- Master's degree
- Employee stock purchase plan
Mission Software Engineer, EW
Anduril Industries —Costa Mesa, CA
- $166,000 - $220,000 a year
- Email
- Travel
- Computer networking
- Linux
Quick Apply
Principal, IC Digital Design Engineer
Marvell —Irvine, CA
- $151,000 - $223,440 a year
- Full-time
- Bachelor of Science
- 11+ years
- Continuous improvement
- Employee stock purchase plan
Principal Product Engineer
Celero Communications, Inc. —Irvine, CA
- $150,000 - $250,000 a year
- Master's degree
- Analysis skills
- Senior level
Senior FPGA Engineer
Relativity Space —Irvine, CA
- $148,000 - $222,000 a year
- 5 years
- Data analysis skills
- Senior level
- Opportunities for advancement
Quick Apply
Principal Engineer Digital Design
Infineon Technologies AG —Irvine, CA
- $175,300 - $241,000 a year
- Full-time
- Background check
- Pass drug screening
- 11+ years
Staff FPGA Engineer, EW
Anduril Industries —Costa Mesa, CA
- $220,000 - $292,000 a year
- Email
- Mentoring
- Linux
- Senior level
Quick Apply
Senior Power Electronics Engineer
AMETEK, Inc. —Irvine, CA
- $150,000 - $180,000 a year
- 7 years
- Microsoft Excel
- Office
- Health savings account
- Paid holidays
Lead, RF/Wireless Engineer - L band RF, GPS, Anti-Jam
L3Harris Technologies —Yorba Linda, CA
- $127,500 - $236,500 a year
- 10 hour shift
- Microsoft Office
- Analysis skills
- Bachelor's degree
- Paid holidays
- Disability insurance
Principal Digital Hardware Engineer (PCBs/FPGAs/HDL)
Anduril Industries —Costa Mesa, CA
- $220,000 - $292,000 a year
- Email
- 11+ years
- Team management
- Senior level
Quick Apply
Software Engineer, Firmware (Motor Controls)
Harbinger Motors Inc. —Garden Grove, CA
- $140,000 - $180,000 a year
- Email
- Mid-level
- 3 years
- Master's degree
Quick Apply
Electrical Engineer III (Hardware) - Defense Systems Division
Parker Hannifin Corporation —Irvine, CA
- $100,300 - $166,900 a year
- Full-time
- 5 years
- Master's degree
- Analysis skills
- Paid parental leave
- Paid holidays

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dsp engineer jobs near orange county ca

Digital Design Engineer

Marvell -
Irvine, CA

Apply Now

Job Details

Full-time
$97,700 - $144,410 a year

Benefits

Employee stock purchase plan

Qualifications

Digital signal processing
Engineering development testing
Verification (System development task)
Software coding
UNIX
Electronics design
System design for system development
Digital circuit design
Design engineering
Software testing
Simulation tools
Electrical optimization

Full Job Description

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Connectivity Group

What You Can Expect

Responsible for design, verification, implementation (ASIC) for high-performance, physical layer, high speed wired data communication networks.
Develop ASIC specification, architecture, and micro-architecture of major functional blocks in complex SOC solutions
Development/simulation of RTL hardware implementations in Verilog and System Verilog
Document and Execute verification plan
Analyze and improve design functionality with Lint, CDC and Power analysis
Participate and contribute in reviews
Work and communicate effectively with global team

What We're Looking For

1-3 years plus experience in developing, implementing, and testing high performance communications and DSP ASIC products
Experience mapping communications algorithms to hardware and understanding of system design tradeoffs for high volume applications.
Must be familiar with signal processing circuit structure and architecture and high performance datapath DSP circuit design and optimization.
Must have extensive RTL experience including design, verification, and synthesis.
Must have strong UNIX-based EDA tool skills and in-depth knowledge of ASIC design flows.
Must be familiar with reusable HDL coding styles and design for high volume manufacture
Experience in bit-exact MATLAB and C/C++ based system simulation and evaluation a plus.
Familiarity with DSP and PHY layer communication protocols of 802.3 is a plus.

Expected Base Pay Range (USD)

97,700 - 144,410, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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Refine Your Search

dsp engineer jobs in orange county ca

Digital Design Engineer

RTL Design Engineer (Silicon Engineering)

Digital Design Engineer

Senior Comms DSP Engineer

Senior Radar DSP Systems Engineer, EW

Sr. Embedded Software Engineer - Radar & DSP

Staff ASIC Design Engineer

Electrical Engineer- - RF Electronics, PCBA

Senior Staff Digital Design Engineer

Mission Software Engineer, EW

Principal, IC Digital Design Engineer

Principal Product Engineer

Senior FPGA Engineer

Principal Engineer Digital Design

Staff FPGA Engineer, EW

Senior Power Electronics Engineer

Lead, RF/Wireless Engineer - L band RF, GPS, Anti-Jam

Principal Digital Hardware Engineer (PCBs/FPGAs/HDL)

Software Engineer, Firmware (Motor Controls)

Electrical Engineer III (Hardware) - Defense Systems Division

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