Top 79 Principal engineer design Jobs in Sacramento, Ca

HBM SoC RTL Design Engineer
Micron —Folsom, CA
- $121,000 - $247,000 a year
- Full-time
- Mid-level
- 3 years
- Master's degree
- Employee stock purchase plan
- Paid holidays
HBM SoC Physical Design Engineer
Micron —Folsom, CA
- $121,000 - $205,000 a year
- Full-time
- 3 years
- Master's degree
- Mentoring
- Employee stock purchase plan
- Paid holidays
IT Specialist I -Enterprise Systems Development Unit
California Department of Finance —Sacramento, CA
- $6,710 - $10,852 a month
- Full-time
- Hybrid work
- Research
- Mid-level
- 4 years
Quick Apply
4d
Principal Engineer - Design
Microchip Technology —Roseville, CA
- $75,000 - $232,000 a year
- Full-time
- Bachelor of Science
- Windows
- Analysis skills
- Employee stock purchase plan
- Health insurance
10d
Senior Staff Digital Design Power Engineer
Qualcomm —Folsom, CA
- $170,040 - $246,000 a year
- 6 years
- Computer Science
- Master's degree
4d
Structural Design Engineer
Harris & Sloan —Sacramento, CA
- $70,304 - $85,000 a year
- Bachelor of Science
- Organizational skills
- Civil Engineering
- Disability insurance
- Dental insurance
AI Design Facilitator and Forward-Deployed Engineer II
Deloitte —Sacramento, CA
- $82,600 - $162,800 a year
- Full-time
- Up to 50% travel
- Bachelor's degree
- Product management
Senior Physical Design Integration Engineer
Intel —Folsom, CA
- $256,050 - $361,480 a year
- Full-time
- Hybrid work
- 11+ years
- Master's degree
- Analysis skills
- Health insurance
Structural Design Engineer
ATM Engineering —Folsom, CA
- Bachelor of Science
- Mid-level
- 3 years
- Paid holidays
- Health insurance
Lead Senior Design Engineer – AI SoC Development
Intel —Folsom, CA
- $220,920 - $311,890 a year
- Full-time
- Hybrid work
- Computer science
- 7 years
- Computer Science
- Health insurance
Mixed Signal Logic Design Engineer
Intel —Folsom, CA
- $122,440 - $232,190 a year
- Full-time
- Computer science
- Computer Science
- Mid-level
- Health insurance
Design Engineer I
MiTek USA Inc —Roseville, CA
- $84,000 - $90,000 a year
- Full-time
- Schematics
- Office
- Travel
- Profit sharing
- Paid parental leave
Quick Apply
Design Verification Architect
Intel —Folsom, CA
- $164,470 - $232,190 a year
- Full-time
- Hybrid work
- Master's degree
- 8 years
- Bachelor's degree
- Health insurance
Senior Design Engineer
Southland Industries Inc. —Sacramento, CA
- $132,293 - $161,692 a year
- Microsoft Excel
- Construction site
- 5 years
- Paid parental leave
- AD&D insurance
Design Engineering Manager
Aldetec, Inc —Sacramento, CA
- Full-time
- Management
- Engineering
- 3 years
Senior SoC Design Verification Engineer
Intel —Folsom, CA
- $164,470 - $269,100 a year
- Full-time
- Hybrid work
- Computer Science
- Master's degree
- 8 years
- Health insurance
Structural Designer I
Lionakis —Sacramento, CA
- $66,200 - $86,900 a year
- Full-time
- Hybrid work
- Project management
- Quality control
- Organizational skills
- Dental insurance
- Paid time off
Quick Apply
IP Logic Design Engineer
Solidigm —Rancho Cordova, CA
- $105,440 - $164,800 a year
- Full-time
- 7 years
- Bachelor of Science
- Analysis skills
Quick Apply
SMTS Silicon Design Engineer
Advanced Micro Devices, Inc —Folsom, CA
- Online Application
- Research
- Mid-level
- Master's degree
1d
R3: Project Manager / Project Engineer
Essel —Sacramento, CA
- $130,000 - $150,000 a year
- Contract
- Construction site
- Mid-level
- 3 years
Quick Apply

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principal engineer design jobs near sacramento, ca

HBM SoC RTL Design Engineer

Micron -
Folsom, CA

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Job Details

Full-time
$121,000 - $247,000 a year

Benefits

Employee stock purchase plan
Paid holidays
Health insurance
Dental insurance
Paid time off
Family leave
Vision insurance

Qualifications

Verilog
SoC
Digital circuit design

Full Job Description

Our vision is to transform how the world uses information to enrich life for all .

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies.

Key Responsibilities

Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die.
Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic).
Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations.
Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure.
Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues.
Contribute to design documentation, block specifications, and design reviews.
Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds.

Minimum Qualifications

Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field, with a minimum of 3 years of experience in a related field.
Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
Experience with the RTL‑to‑GDS flow, including synthesis, static timing analysis, and develop sign‑off considerations.
Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens.
Programming or scripting experience (e.g., Python, TCL, Perl, or shell scripting).

Preferred Qualifications

Experience with HBM, DRAM, or memory‑centric SoC designs.
Familiarity with high‑speed interfaces, clocking strategies, reset architectures, and power management concepts.
Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug.
Experience with hardware emulation or acceleration platforms. (e.g., Palladium, Veloce, Zebu)
Good understanding of Agentic AI or willingness to learn Agentic AI to help develop efficient workflow.

The US base salary range that Micron Technology estimates it could pay for this full-time position is:

$121,000.00 - $247,000.00 a year

Additional compensation may include benefits, bonuses and equity.
Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits .

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

To learn about your right to work click here.

To learn more about Micron, please visit micron.com/careers

US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at [email protected] or 1-800-336-8918 (select option #3)

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.

Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

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Refine Your Search

principal engineer design jobs in sacramento, ca

HBM SoC RTL Design Engineer

HBM SoC Physical Design Engineer

IT Specialist I -Enterprise Systems Development Unit

Principal Engineer - Design

Senior Staff Digital Design Power Engineer

Structural Design Engineer

AI Design Facilitator and Forward-Deployed Engineer II

Senior Physical Design Integration Engineer

Structural Design Engineer

Lead Senior Design Engineer – AI SoC Development

Mixed Signal Logic Design Engineer

Design Engineer I

Design Verification Architect

Senior Design Engineer

Design Engineering Manager

Senior SoC Design Verification Engineer

Structural Designer I

IP Logic Design Engineer

SMTS Silicon Design Engineer

R3: Project Manager / Project Engineer

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