Top 15 Processor architect Jobs in San Francisco, Ca

Architecture - I/O Architect
Eliyan —San Francisco Bay Area, CA
- Full-time
- Master's degree
- 8 years
- Mentoring
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Senior Hardware Engineer - Micro-Architect
quadric, Inc —Burlingame, CA
- $110,000 - $270,000 a year
- Full-time
- Bachelor of Science
- Office
- Doctor of Philosophy
- Health insurance
- Dental insurance
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Software Engineer, Payments
OpenAI —San Francisco, CA
- $255,000 - $440,000 a year
- Full-time
- Hybrid work
- 5 years
- System design
- Office
Staff Electrical Engineer
Mytra —Brisbane, CA
- $190,000 - $230,000 a year
- Full-time
- Bachelor of Science
- 8 years
- Bachelor's degree
- Commuter assistance
- Paid holidays
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Staff Software Engineer (Payments), Backend
GoodLeap —San Francisco, CA
- $155,400 - $193,500 a year
- Full-time
- Hybrid work
- 8 years
- AWS
- Continuous improvement
Lead Systems/DSP Engineer
Ethernovia, Inc. —San Francisco, CA
- $180,000 - $250,000 a year
- Hybrid work
- C++
- Doctor of Philosophy
- Mentoring
- Health insurance
- Dental insurance
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4d
Senior Design Verification Engineer
quadric, Inc —Burlingame, CA
- $110,000 - $270,000 a year
- Full-time
- 5 years
- Office
- Software development
- Health insurance
- Dental insurance
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Staff Firmware Engineer
iota Biosciences, Inc. —Alameda, CA
- $170,000 - $220,000 a year
- Full-time
- Computer Science
- Bachelor of Science
- 8 years
- Paid parental leave
- Health insurance
Staff Firmware Engineer - Medical
Avive —Brisbane, CA
- $170,000 - $200,000 a year
- Full-time
- Hybrid work
- Bachelor of Science
- System design
- Laboratory experience
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Staff Electrical Engineer - Power System Design
Mytra —Brisbane, CA
- $190,000 - $230,000 a year
- Full-time
- Bachelor of Science
- 8 years
- Bachelor's degree
- Commuter assistance
- Paid holidays
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Payments Technical Architecture Senior Manager
Accenture —San Francisco, CA
- $122,700 - $338,300 a year
- Full-time
- Azure
- Computer Science
- Sales
- Paid holidays
- Disability insurance
Senior Associate Engineer, Product Software
Equinix —Redwood City, CA
- $109,000 - $163,000 a year
- Full-time
- Computer Science
- Mid-level
- Office
- Paid holidays
- Paid time off
Director, VCA Implementation Services
Visa U.S.A. Inc. —San Francisco, CA
- $160,500 - $285,600 a year
- Full-time
- Office
- Bachelor's degree
- Travel
- Wellness program
- Health savings account

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Architecture - I/O Architect

Eliyan
San Francisco Bay Area, CA

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Job Details

Full-time

Qualifications

Automation
Electronics design
Design engineering
Scripting

Full Job Description

Join the leading chiplet startup! As an Eliyan NuLink PHY IO Architect, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will drive the definition and development of cutting-edge ASICs from RTL to GDSII. You will work with a cross-functional team of industry experts that operate from first principles, innovate, and push the envelope to create high-volume and high-performance manufacturable products. In this role, you will own the architecture, oversee design and validation, and be a focal point for customer and marketing team interactions. You will also focus on developing and improving design flows and methodologies to ensure high-quality, on-time delivery. We offer a fun work environment with excellent benefits. ONSITE M-F

Key Responsibilities:

Architecture: Define NuLink PHY subsystems (physical and logical/link layers) and hierarchical modular protocol bridges between PCIe, AXI4, APB, CHI, CXL (.io/.cache/.mem), DDR to name a few. Definition of a firmware first based hardware architecture approach.
Protocol Design: Design protocol conversion layers with transaction ordering, credit-based flow control, QoS, address translation, coherency management, and memory semantics across protocol domains
Performance Evaluation and Optimization: Model and tune PHY data path, link protocols, and CDC architectures for protocol efficiency, bandwidth, latency, power, and signal integrity. Conduct technical evaluation and benchmark analysis against internal and external IPs.
Collaboration: Partner with ASIC, firmware, and post-silicon teams. Support customer integration for compute-to-memory (CXL/DDR), processor interconnect (AXI/PCIe), and control plane (APB). Create clear and comprehensive architecture specifications with foolproof integration guidelines.
Validation: Review characterization plans for PLL, VCO, ATB, and link training. Create protocol testbenches validating transaction handling, latency, throughput, and compliance
Compliance: Ensure UCIe, PCIe, CXL, AMBA AXI/APB, and DDR specification compliance. Define interoperability requirements and protocol error handling. Be part of industry standards bodies and work groups to keep Eliyan's product implementations up to date with the latest versions of the standards.
Leadership: Mentor engineers on protocol implementation, timing constraints, and hierarchical design. Effectively collaborate with industry technologists, business leaders and ability to network seamlessly with industry peers to influence stakeholders.

Minimum Qualifications:

Expertise in multiple areas of architecture definition, chip micro-architecture, protocol definition and implementation
Strong knowledge of two or more of the following connectivity protocols - PCIe, UCIe, UALink, Ethernet, DDR, AMBA
Strong scripting and automation skills
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
8+ years' of experience

Ideal Qualifications:

15+ years of experience in ASIC architecture with strong bias for practical logic design and influence of physical implementation, with a proven track record of leading teams through successful tapeouts
Performance modeling of hardware implementations with high level languages like C, C++ or SystemC
Adept at clocking and floorplan guidelines for PHY implementation
Extremely knowledgeable on RTL-to-GDSII flows, limitations, and flexibilities to improve productivity and power aware designs
Exceptional problem-solving skills.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

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processor architect jobs in san francisco, ca

Architecture - I/O Architect

Senior Hardware Engineer - Micro-Architect

Software Engineer, Payments

Staff Electrical Engineer

Staff Software Engineer (Payments), Backend

Lead Systems/DSP Engineer

Senior Design Verification Engineer

Staff Firmware Engineer

Staff Firmware Engineer - Medical

Staff Electrical Engineer - Power System Design

Payments Technical Architecture Senior Manager

Senior Associate Engineer, Product Software

Director, VCA Implementation Services

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