Top 83 Foundry interface Jobs in Santa Clara, Ca

Sr. SRAM Layout Design Engineer
UST —Santa Clara, CA
- $101,000 - $152,000 a year
- Schematics
- Mentoring
- Fair chance
- Paid jury duty
- Health savings account
Quick Apply
16h
Director-Foundry Customer Planning
Intel —Santa Clara, CA
- $220,320 - $363,860 a year
- Full-time
- Hybrid work
- 6 years
- Bachelor of Science
- Office
- Health insurance
VP Global Operations
Rambus —San Jose, CA
- $243,600 - $452,400 a year
- Full-time
- Hybrid work
- Engineering
- Data analysis skills
- Office
- Employee stock purchase plan
- Health insurance
Staff Supply Chain Planner
Marvell —Santa Clara, CA
- $106,800 - $160,000 a year
- 6 years
- Oracle
- Office
- Employee stock purchase plan
Dir Sales - Silicon IP
Rambus —San Jose, CA
- $246,000 - $457,000 a year
- Full-time
- Hybrid work
- Office
- Master's degree
- Project management
- Employee stock purchase plan
- Health insurance
Director – PDK Architecture
Intel —Santa Clara, CA
- $233,990 - $330,340 a year
- Full-time
- Office
- Doctor of Philosophy
- Senior level
- Health insurance
15h
Senior Customer Technical Enablement and Debug Engineer
Intel —Santa Clara, CA
- $141,910 - $269,100 a year
- Full-time
- Hybrid work
- 5 years
- Master's degree
- Continuous improvement
- Health insurance
Senior Director, Program Management - Data Center Custom Silicon
Qualcomm —Santa Clara, CA
- $228,000 - $342,000 a year
- Computer Science
- 5 years
- Engineering
6d
Design Verification Engineer
Intel —Santa Clara, CA
- $141,910 - $200,340 a year
- Full-time
- Hybrid work
- Computer Science
- Bachelor of Science
- Mid-level
- Health insurance
Sr. Package Layout Engineer, Annapurna Labs - AI Silicon Packaging
Annapurna Labs (U.S.) Inc. —Cupertino, CA
- $159,200 - $247,600 a year
- Full-time
- Master's degree
- Mentoring
- Fair chance
- AD&D insurance
- Health insurance
R&D AI & Intelligent Tool Development Engineer, Joint Development Modules (7735)
TSMC —San Jose, CA
- $150,000 - $250,000 a year
- Hybrid work
- Office
- Doctor of Philosophy
- Software development
Sr. Sales Manager, Ecosystem Development
Cadence Design Systems —San Jose, CA
- $143,500 - $266,500 a year
- Full-time
- Customer service
- Writing skills
- Organizational skills
- Employee stock purchase plan
- Paid holidays
1d
Foundry Applications Engineer
STMicroelectronics —Santa Clara, CA
- $151,200 - $189,000 a year
- Hybrid work
- Mid-level
- Training & development
- Electrical Engineering
Project Manager/Program Manager (7702)
TSMC —San Jose, CA
- $130,000 - $210,000 a year
- 11+ years
- Master's degree
- Senior level
Project Manager/Program Manager
TSMC —San Jose, CA
- $130,000 - $210,000 a year
- 11+ years
- Master's degree
- Continuous improvement
9d
Principal (STA/ Sign-Off) Engineer-17042 (Austin/ Sunnyvale)
Synopsys —Sunnyvale, CA
- $191,000 - $286,000 a year
- Bachelor of Science
- 11+ years
- Office
Senior SoC Compute/Memory Subsystem Architect
Intel —Santa Clara, CA
- $164,470 - $269,100 a year
- Full-time
- Hybrid work
- 7 years
- System design
- Office
- Health insurance
R&D Engineer
Broadcom —San Jose, CA
- $167,500 - $268,000 a year
- Full-time
- 11+ years
- Assembly
- Doctor of Philosophy
- Employee stock purchase plan
- Paid holidays
Facilities & Fab Equipment Technician
THAT Corporation —San Jose, CA
- $30 - $45 an hour
- Full-time
- 5 years
- Engineering
- Mid-level
- Health savings account
- Health insurance
Quick Apply
DMTS Digital Design Engineer / Chip Lead
Micron —San Jose, CA
- $206,000 - $410,000 a year
- Full-time
- Bachelor of Science
- Analysis skills
- Doctor of Philosophy
- Employee stock purchase plan
- Paid holidays

I want to receive the latest job alert for foundry interface in santa clara, ca

By signing in to your account, you agree to SimplyHired's Terms of Service and consent to our Cookie and Privacy Policy.

Explore jobs in more locations

foundry interface jobs near santa clara, ca

Vice President Of Operations jobs in San Jose, CA

Senior Technical Engineer jobs in Santa Clara, CA

Supply Chain Specialist jobs in Santa Clara, CA

R&D Engineer jobs in San Jose, CA

Director Of Program Management jobs in Santa Clara, CA

Principal Software Engineer jobs in Sunnyvale, CA

Tooling Engineer jobs in San Jose, CA

Project Manager jobs in San Jose, CA

Design Verification Engineer jobs in Santa Clara, CA

Senior Sales Manager jobs in San Jose, CA

Technical Program Manager jobs in Santa Clara, CA

Facilities Technician jobs in San Jose, CA

Vice President Of Operations jobs in Lexington, KY

Vice President Of Operations jobs in Midland, TX

Finance Operations jobs in Remote

Vice President Of Operations jobs in Chandler, AZ

Vice President Of Operations jobs in Irving, TX

Senior Technical Engineer jobs in Greenville, SC

Senior Technical Engineer jobs in Louisville, CO

Senior Technical Engineer jobs in North Charleston, SC

Sr. SRAM Layout Design Engineer

UST -
Santa Clara, CA

Quick Apply

Job Details

$101,000 - $152,000 a year
16 hours ago

Benefits

Paid jury duty
Health savings account
Paid holidays
Disability insurance
Health insurance
Dental insurance
Flexible spending account
Vision insurance
401(k) matching
Bereavement leave
Life insurance
Paid sick time

Qualifications

Verification (System development task)
Mentoring
Design for manufacturability (DFM)
Debugging

Full Job Description

Role description

Sr. SRAM Layout Design Engineer

Technical Lead II – VLSI

Who We Are:

Born digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding innovation and agility into everything they do. We help them create transformative experiences and human-centered solutions for a better world.

UST is a mission-driven group of 29,000+ practical problem solvers and creative thinkers in more than 30 countries. Our entrepreneurial teams are empowered to innovate, act nimbly, and create a lasting and sustainable impact for our clients, their customers, and the communities in which we live.

With us, you’ll create a boundless impact that transforms your career—and the lives of people across the world.

Visit us at UST.com.

You Are:

UST is searching for a Sr. SRAM Layout Design Engineer who will manage the complete custom layout process for SRAM bitcell arrays, memory periphery, test structures, and memory macros in advanced CMOS technologies.

The opportunity:

Develop and improve floorplans for SRAM and memory blocks, covering array layout, periphery positioning, power grid design, routing channels, and macro assembly.

Carry out, debug, and complete DRC, LVS, ERC, antenna, and associated physical verification checks with tools such as Calibre, ICV, or similar workflows.

Support EM/IR review, power integrity, density/fill, DFM, dummy insertion, layout-dependent effects, and other requirements for tapeout.

Collaborate with circuit designers to convert schematics into layouts, ensuring matching, symmetry, shielding, parasitic targets, and reliability constraints are maintained.

Collaborate with PnR and integration teams to resolve top-level DRC/LVS, pin access, boundary, routing, power-grid, and macro-integration issues.

Implement and advance layout methodology, checklists, reusable practices, and quality standards for consistent memory IP delivery.

Collaborate with foundry, CAD, and methodology teams on rule interpretation, deck behavior, waivers, and advanced-node process constraints.

Review layouts, mentor junior engineers, and help raise layout quality and execution rigor across the team.

This position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.

What you need:

Have a BSEE or equivalent experience 10+ years of custom IC layout experience, including 5+ years in SRAM, memory compiler, or full-custom memory IP layout.

Hands-on participation in advanced CMOS technology initiatives, preferably concentrating on FinFET or GAA nodes at 5nm, 3nm, or smaller dimensions.

Solid grasp of SRAM and memory layout principles.

Extensive experience in Cadence Virtuoso applied to custom layout creation and assessment.

Extensive experience in DRC/LVS debugging using Calibre, ICV, or similar physical verification tools.

Experience with floorplanning, block-level routing, macro assembly, pin planning, boundary/interface management, and top-level physical verification.

Direct familiarity with advanced-node layout limitations and layout-dependent phenomena, including LOD, density/fill, matching, symmetry, shielding, electromigration, IR drop, and DFM or similar expertise.

Ability to work effectively with circuit build, physical build, integration, CAD, and foundry teams.

Clear communication, strong ownership, good judgment, and the ability to mentor other engineers. Knowledge of layout automation or AI tools is a definite plus.

Compensation can differ depending on factors including but not limited to the specific office location, role, skill set, education, and level of experience. UST provides a reasonable range of compensation for roles that may be hired in various U.S. markets as set forth below.

Role Location: California

Compensation Range: $101,000-$152,000

Benefits

Full-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty. They are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits. Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines. Benefits offerings vary in Puerto Rico.

Part-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching.

Full-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) program with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance.

Part-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).

All US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.

What we believe:

We proudly embrace the values that have shaped UST since day one. We build our culture of Humility, Humanity, and Integrity. These values inspire us to nurture a people-first, human centric culture that fosters diversity, prioritizes sustainable solutions, and keeps our people and clients at the forefront of all decisions.

Humility:

We will listen, learn, be empathetic and help selflessly in our interactions with everyone.

Humanity:

Through business, we will better the lives of those less fortunate than ourselves.

Integrity:

We honor our commitments and act with responsibility in all our relationships.

Equal Employment Opportunity Statement

UST is an Equal Opportunity Employer.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, status as a protected veteran, or any other applicable characteristics protected by law. We will consider qualified applicants with arrest or conviction records in accordance with state and local laws and “fair chance” ordinances.

UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.

#UST

#LI-AK3

Skills

Analog Layout, CMOS, Cadence Virtuoso, Calibre

Benefits
Compensation range: $101,000.00 to $152,000.00 per year
About UST
UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.

Quick Apply

Refine Your Search

foundry interface jobs in santa clara, ca

Sr. SRAM Layout Design Engineer

Director-Foundry Customer Planning

VP Global Operations

Staff Supply Chain Planner

Dir Sales - Silicon IP

Director – PDK Architecture

Senior Customer Technical Enablement and Debug Engineer

Senior Director, Program Management - Data Center Custom Silicon

Design Verification Engineer

Sr. Package Layout Engineer, Annapurna Labs - AI Silicon Packaging

R&D AI & Intelligent Tool Development Engineer, Joint Development Modules (7735)

Sr. Sales Manager, Ecosystem Development

Foundry Applications Engineer

Project Manager/Program Manager (7702)

Project Manager/Program Manager

Principal (STA/ Sign-Off) Engineer-17042 (Austin/ Sunnyvale)

Senior SoC Compute/Memory Subsystem Architect

R&D Engineer

Facilities & Fab Equipment Technician

DMTS Digital Design Engineer / Chip Lead

I want to receive the latest job alert for foundry interface in santa clara, ca

Related Searches

Explore jobs in more locations

Job Seeker Tools

Employer Tools

Browse

Stay Connected