Top 497 Field programmable gate array Jobs in Sunnyvale, Ca

Secret Cleared FPGA Verification Engineer (Job ID 003150)
Innovien Solutions —Sunnyvale, CA
- From $80 an hour
- Full-time
- Analysis skills
- In-person
- Senior level
- Health savings account
- Health insurance
Quick Apply
11d
Sr. Electrical Engineer – (Paid Relo - Reno, NV; $200K)
#twiceasnice Recruiting —California
- $150,000 - $200,000 a year
- Full-time
- 5 years
- Bachelor's degree
- Mentoring
- Relocation assistance
- Health insurance
Quick Apply
3d
High speed Board Design Engineer
Pyramid Consulting, Inc —San Jose, CA
- $45 - $50 an hour
- Urgently hiring
- 7 years
- Analysis skills
- Mentoring
- Health insurance
- Dental insurance
Quick Apply
Electrical Design Validation Engineer
Experis —San Jose, CA
- $43 an hour
- Contract
- Mid-level
Quick Apply
2d
FPGA Engineer
Everforth —Sunnyvale, CA
- Full-time
- Maintenance
- Mid-level
- Master's degree
- Health insurance
- Dental insurance
Quick Apply
5d
Hardware Verification Engineer, Entry Level
Synopsys —Sunnyvale, CA
- $90,000 - $136,000 a year
- Contract
- Computer science
- Computer Science
- Master's degree
1d
SoC ASIC Verification Engineer – New College Grad 2026
NVIDIA —Santa Clara, CA
- $100,000 - $189,750 a year
- Full-time
- Computer Science
- Master's degree
- Analysis skills
Jr. Product Test Engineer
Lewiz communications —San Jose, CA
- Linux
- Electrical Engineering
- Communication skills
SoC Verification Engineer – NoC / UVM
Advanced Micro Devices, Inc —San Jose, CA
- Hybrid work
- Master's degree
- Senior level
- Electrical Engineering
SoC Verification Lead
NVIDIA —Santa Clara, CA
- $232,000 - $368,000 a year
- Full-time
- 11+ years
- Master's degree
- Experience equivalent to degree accepted
Senior IP Verification Engineer
NVIDIA —Santa Clara, CA
- $136,000 - $264,500 a year
- Full-time
- Hybrid work
- 5 years
- Bachelor of Science
- Senior level
FPGA Field Application Engineer
GOWIN Semiconductor Corp —San Jose, CA
- Email
- Computer science
- Computer Science
- Mid-level
Design Verification Engineers (Sunnyvale, CA)
Tachyum —Sunnyvale, CA
- $130,000 - $280,000 a year
- Computer science
- Computer Science
- Mid-level
- Opportunities for advancement
AI Inference Performance Engineer
NVIDIA —Santa Clara, CA
- $152,000 - $241,500 a year
- Full-time
- Computer science
- Computer Science
- 5 years
Product Manager - Verification IP
Siemens —Fremont, CA
- $10 - $15 an hour
- Full-time
- Hybrid work
- 8 years
- Product management
- Senior level
Board Design & Field Systems Engineer – New Product
Advanced Micro Devices, Inc —San Jose, CA
- Master's degree
- Senior level
- Electrical Engineering
Design Verification Engineer
Intel —Santa Clara, CA
- $141,910 - $200,340 a year
- Full-time
- Hybrid work
- Computer Science
- Bachelor of Science
- Mid-level
- Health insurance
10d
DFx Methodology Architect
Advanced Micro Devices, Inc —San Jose, CA
- Hybrid work
- Management
- Master's degree
- Doctor of Philosophy
Verification Lead (Lead DV)
Lumilens —San Jose, CA
- Full-time
- Senior level
- Health insurance
- Dental insurance
9d
Engineering, Engineer
Synopsys —Sunnyvale, CA
- $90,000 - $136,000 a year
- Computer science
- Computer Science
- Mid-level
1d

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field programmable gate array jobs near sunnyvale, ca

Secret Cleared FPGA Verification Engineer (Job ID 003150)

Innovien Solutions -
Sunnyvale, CA

Quick Apply

Job Details

Permanent | Full-time | Contract
From $80 an hour
11 days ago

Benefits

Health savings account
Health insurance
Dental insurance
401(k)
Flexible spending account
Paid time off
Vision insurance
401(k) matching
Life insurance
Referral program
Retirement plan

Qualifications

Regression testing implementation
Verification (System development task)
Test case design
FPGA
Triage
Analysis skills
Test analysis
SystemVerilog
Debugging
Failure analysis

Full Job Description

FPGA Verification Engineer | Active Secret Clearance Required

Innovien is supporting a high-priority national defense program, and we're hiring an FPGA Verification Engineer to own the chip-level verification work. The test environment is built and the RTL is locked — you skip the setup and go straight to executing the cases that prove the chip behaves exactly as it has to. This is deep verification work on hardware that matters.

What You'll Do

Execute directed and constrained-random test cases and stimulus against completed FPGA RTL to verify chip-level functional behavior against design specifications
Run functional simulations in an established VCS environment, analyze results, and debug failures using waveform analysis and coverage reports
Identify, document, and drive failures to resolution alongside the RTL design team
Re-run regression suites as design changes come through to confirm fixes hold and nothing downstream breaks
Support verification across program assemblies through the build and verification phase

What You Bring

6+ years of hands-on FPGA verification focused on functional verification — not RTL design or board bring-up
Proven chip-level verification experience running against completed RTL: directed and constrained-random test cases, proving functional behavior against a design spec
Strong working knowledge of UVM in SystemVerilog — able to build and run stimulus, triage failures, and close out verification problems independently
Hands-on Synopsys VCS for functional simulation, testbench execution, and RTL debug; comfortable driving regressions and reading coverage reports
Active U.S. Secret clearance; U.S. citizenship required

Nice to Have

Verdi for waveform analysis and debug alongside VCS; Vivado for Xilinx/AMD toolchain work
Questa or ModelSim simulation experience
Prior verification on defense, aerospace, or other cleared programs in a classified environment
Familiarity with Lint and CDC analysis for code quality and clock domain crossing checks

Details

Active U.S. Secret clearance required

Pay: From $80.00 per hour

Benefits:

401(k)
401(k) matching
Dental insurance
Flexible spending account
Health insurance
Health savings account
Life insurance
Paid time off
Referral program
Retirement plan
Vision insurance

Work Location: In person

Quick Apply

Refine Your Search

field programmable gate array jobs in sunnyvale, ca

Secret Cleared FPGA Verification Engineer (Job ID 003150)

Sr. Electrical Engineer – (Paid Relo - Reno, NV; $200K)

High speed Board Design Engineer

Electrical Design Validation Engineer

FPGA Engineer

Hardware Verification Engineer, Entry Level

SoC ASIC Verification Engineer – New College Grad 2026

Jr. Product Test Engineer

SoC Verification Engineer – NoC / UVM

SoC Verification Lead

Senior IP Verification Engineer

FPGA Field Application Engineer

Design Verification Engineers (Sunnyvale, CA)

AI Inference Performance Engineer

Product Manager - Verification IP

Board Design & Field Systems Engineer – New Product

Design Verification Engineer

DFx Methodology Architect

Verification Lead (Lead DV)

Engineering, Engineer

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