Top 80 Field programmable gate array Jobs in Tempe, Az

Principal PCB & Substrate Layout Engineer
Belcan —Phoenix, AZ
- $98 an hour
- Contract
- Engineering
- Experience equivalent to degree accepted
- Senior level
- Paid holidays
- Health insurance
Quick Apply
Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $135,396 - $150,205 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
Aerospace Test Engineer
HireTalent —Gilbert, AZ
- $70 - $100 an hour
- Full-time
- Computer Science
- Schematics
- Bachelor of Science
Quick Apply
2d
Senior Advanced Electrical Engineer
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $142,696 - $158,303 a year
- Full-time
- Hybrid work
- 6 years
- Management
- Master's degree
- Paid parental leave
- Health insurance
Advanced ASIC FPGA Design Engineer for Crypto and Cross Domain Solutions
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $135,396 - $150,205 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
Senior FPGA Engineer
Belcan —Phoenix, AZ
- $130,000 - $180,000 a year
- Full-time
- Hybrid work
- 5 years
- Senior level
- Electrical Engineering
- Paid holidays
- Health insurance
Quick Apply
3d
Sr. Electrical Engineer – (Paid Relo - Reno, NV; $200K)
#twiceasnice Recruiting —Arizona
- $150,000 - $200,000 a year
- Full-time
- 5 years
- Bachelor's degree
- Mentoring
- Relocation assistance
- Health insurance
Quick Apply
4d
Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $182,139 - $202,060 a year
- Full-time
- Research
- Master's degree
- 8 years
- Paid parental leave
- Health insurance
9d
Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $122,785 - $136,215 a year
- Full-time
- Hybrid work
- Data analysis skills
- Research
- 3 years
Test Engineer
TEKBERRY —Gilbert, AZ
- $70 - $100 an hour
- Full-time
- Microsoft Excel
- Computer Science
- Mid-level
Quick Apply
4d
Field Service Engineer 1
AEM —Chandler, AZ
- $65,000 - $74,000 a year
- Full-time
- Microsoft Excel
- Pass drug screening
- Mid-level
- Health savings account
- Health insurance
Quick Apply
Sr Principal Electrical Engineer - 4
Northrop Grumman —Chandler, AZ
- $122,800 - $184,200 a year
- Overtime
- 6 years
- Software troubleshooting
- Master's degree
- Paid holidays
- Disability insurance
4d
Senior Digital Design Engineer
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $118,519 - $131,482 a year
- Urgently hiring
- Hybrid work
- 3 years
- Master's degree
- Analysis skills
- Paid parental leave
- Health insurance
Senior Systems and Test Integration Engineer- Hardware DevOps Environment
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $112,924 - $125,275 a year
- Full-time
- DevOps
- Windows
- 3 years
- Paid parental leave
- Health insurance
Senior Hardware Engineer
Everforth —Phoenix, AZ
- Full-time
- 7 years
- Master's degree
- Mentoring
- Health insurance
- Dental insurance
Quick Apply
5d
Applications Engineering Consultant – FPGA Prototyping Justification
Siemens —Tempe, AZ
- $146,700 - $293,400 a year
- Full-time
- Hybrid work
- 7 years
- Bachelor of Science
- Office
10d
Senior Design Verification Engineer
Viasat, Inc. —Tempe, AZ
- $141,500 - $264,000 a year
- Online Application
- Remote
- 8 years
- Travel
- Agile
Senior Design Verification Engineer
Viasat —Tempe, AZ
- $141,500 - $264,000 a year
- Online Application
- 8 years
- Travel
- Agile
DSP Engineer (Space)
Viasat —Tempe, AZ
- $132,500 - $246,500 a year
- Online Application
- System design
- Analysis skills
- Travel
Applications Engineer - FPGA Prototyping
Siemens —Tempe, AZ
- $334,400 a year
- Full-time
- Hybrid work
- 5 years
- Bachelor of Science
- Office

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Principal PCB & Substrate Layout Engineer

Belcan -
Phoenix, AZ

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Job Details

Contract
$98 an hour

Benefits

Paid holidays
Health insurance
Dental insurance
401(k)
Paid time off
Vision insurance
Life insurance

Qualifications

3D modeling software
3D modeling for product design
Printed circuit board (PCB) layout

Full Job Description

Job Title: Principal PCB & Substrate Layout Engineer
Pay Rate: $98/hr.
Location: Phoenix, AZ
Zip Code: 85034
Job Type: Contract
Job Duration: 7 Months
Schedule and Shift: 9-80 A|1st Shift|09:00 AM|N
Keyword's: #Phoenixjobs; #PrincipalPCBjobs; #SubstrateLayoutEngineerjobs; #INDSUB
Start Date: Immediate

We provide a competitive pay and benefits package. This position is offering a pay rate of $98/hr. however, Belcan considers several factors when extending an offer, including but not limited to education, experience, geographic location, and discipline. Benefits offered may include health care, dental, vision, life insurance; 401(k); education assistance; paid time off including PTO, holidays, and any other paid leave required by law.

Job Summary: Principal PCB & Substrate Layout Engineer
Our client"s Microsystems business is seeking an experienced Principal PCB & Substrate Layout Engineer to join our growing, engaging, and collaborative team. As a valued team member, you will collaborate to deliver leading edge microelectronics that are game changing and impactful to our nation"s defense. Client sits at the intersection of high-tech and defense - we are focused on accelerating innovations that matter to the aerospace, defense, and space sectors. We leverage our longstanding strategic partnerships to access the latest in commercial technologies to design, manufacture, test, and deliver rugged microelectronics that operate in the harshest environments, with extreme reliability and maintainability. Client partners closely with the U.S. government delivering onshore trusted microelectronics.

You are responsible for:
Providing technical leadership to the engineering team specifically focused on High-Speed Interfaces and High Density Substrates layout techniques and understanding and improving our layout development processes to ensure we produce quality products using your expertise in PCB and Substrate layout engineering.

Responsibilities:

Driving design, layout, and analysis of complicated electrical and mechanical systems and their constituent parts including: high-density interposers, substrates, and printed circuit board (PCB) layouts. This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip)
Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias, ball grid arrays (BGAs), RF, design for test (DFT), impedance calculations, cross talk, differential pairs, PCB stack-ups, PCB via structures, electromagnetic compatibility (EMC), material studies/selection, etc.
Understand Design For Manufacturing rules of our suppliers and ensure design process matches their capabilities
Understand and provide fabrication drawings that match the intent of the design and support the fabrication suppliers to ensure the technical intent is transferred successfully
Support package material characterization frequency dependent model; skin effects, smoothness, roughness, dielectric loss and dielectric constant
Work with peers and the engineering team to review the artwork and drawings at different stages and at the final design review for fabrication and assembly
Provide support for multidisciplinary investigations and feasibility studies with collaboration across engineering disciplines
Provide Technical guidance for interfacing to customers, subcontractors, assemblers, fabricators, and vendors/suppliers, operations, quality, supply chain, and supporting organizations
Works on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors
Considers the effects of actions on the system as a whole, i.e. 'systems-thinking'
Willing to help the team in areas outside of specific technical discipline to accomplish goals

You will be a part of:
The team responsible for the rapid development of affordable, chip-scale, secure, open system architecture devices. This leading-edge capability also addresses a need by the Department of Defense (DoD) for made-in-USA microelectronics that equip our warfighters with state-of-the-art, Trusted, military-grade products that leverage the most advanced commercial technologies..

To succeed in this role, you should have the following skills and experience:

Minimum Education: Bachelor's Degree in Engineering or equivalent education and experience required
Minimum Experience: 10+ years as a PCB and/or High-Density Package Layout designer using industry standard layout tools like Cadence APD+
Experience with APD+ physical and electrical constraint editor
HDI stack-ups, including use of blind & buried micro-vias, specialty RF dielectric materials, and trace width/spacing around 15um/15um down to 2um/2um or below
Experience with 2.5D devices, interposer or substrate design, flip-chip, surface mount, die stacking, package stacking, substrate stacking and other techniques
Experience using a Cadence schematic / netlist driven CAD layout process, e.g. Cadence APD+ (Allegro) and supporting tools
High-end FPGA package or board design experience
Ability to work with our Mechanical team to design full 3D models for fit checks and thermal
Understanding of layout techniques in Digital, Analog, and/or RF layouts
Knowledge of electronic packaging techniques
Experience using a CAM package for manufacturing data validation. Knowledge of CAM350 & Blueprint is preferred
Working knowledge of JEDEC /IPC design, fabrication, and assembly specifications
Experience creating assembly documentation and fabrication deliverables per company and industry standards
Must be a US Person
Work effectively individually and as part of a team
Embrace the company culture that includes the following values and behaviors:

o Teamwork, execution, and communication

Belcan is an equal opportunity employer. Your application and candidacy will not be considered based on race, color, sex, religion, creed, sexual orientation, gender identity, national origin, disability, genetic information, pregnancy, veteran status or any other characteristic protected by federal, state or local laws.

Quick Apply

Refine Your Search

field programmable gate array jobs in tempe, az

Principal PCB & Substrate Layout Engineer

Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions

Aerospace Test Engineer

Senior Advanced Electrical Engineer

Advanced ASIC FPGA Design Engineer for Crypto and Cross Domain Solutions

Senior FPGA Engineer

Sr. Electrical Engineer – (Paid Relo - Reno, NV; $200K)

Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)

Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)

Test Engineer

Field Service Engineer 1

Sr Principal Electrical Engineer - 4

Senior Digital Design Engineer

Senior Systems and Test Integration Engineer- Hardware DevOps Environment

Senior Hardware Engineer

Applications Engineering Consultant – FPGA Prototyping Justification

Senior Design Verification Engineer

Senior Design Verification Engineer

DSP Engineer (Space)

Applications Engineer - FPGA Prototyping

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