Top 65 modem asic design engineer Jobs

Senior FPGA Design Engineer
Three Point Solutions, Inc. —Rochester, NY
- $110,000 - $140,000 a year
- Full-time
- 11+ years
- Bachelor's degree
- Linux
- Relocation assistance
- Dental insurance
Quick Apply
Senior Specialist, Electrical Engineer - FPGA
L3Harris Technologies —Rochester, NY
- $92,500 - $171,500 a year
- Full-time
- 7 years
- Bachelor's degree
- Organizational skills
- Paid holidays
- Disability insurance
5d
Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development
Qualcomm —San Diego, CA
- $104,000 - $191,900 a year
- Computer Science
- Mid-level
- Master's degree
Physical Design Engineer - Multiple Levels
Qualcomm —Santa Clara, CA
- $140,000 - $229,800 a year
- Multiple hires
- Engineering
- Mid-level
- Analysis skills
Principal ASIC Design Engineer (Starshield)
SpaceX —Irvine, CA
- $200,000 - $285,000 a year
- Weekends as needed
- Computer science
- Computer Science
- 8 years
- Paid parental leave
- Employee stock purchase plan
Sr. ASIC Design Engineer (Starshield)
SpaceX —Irvine, CA
- $160,000 - $225,000 a year
- Weekends as needed
- Computer science
- Computer Science
- 5 years
- Paid parental leave
- Employee stock purchase plan
RFIC Design Engineer (RFIC Engineering)
SpaceX —Irvine, CA
- $125,000 - $175,000 a year
- Weekends as needed
- Computer Science
- System design
- Mid-level
- Paid parental leave
- Employee stock purchase plan
Communication Systems Engineer
Career Finders —San Diego, CA
- Mid-level
- Electrical Engineering
Sr. RFIC Design Engineer (RFIC Engineering)
SpaceX —Irvine, CA
- $160,000 - $225,000 a year
- Weekends as needed
- Computer Science
- 5 years
- Master's degree
- Paid parental leave
- Employee stock purchase plan
Sr. RFIC Engineer
SpaceX —Irvine, CA
- $160,000 - $225,000 a year
- Weekends as needed
- Computer science
- Computer Science
- 5 years
- Paid parental leave
- Employee stock purchase plan
Senior ASIC Design Verification Engineer - Terawave
Blue Origin —Central, TX
- $197,529.00 - $276,539.55 a year
- Full-time
- Background check
- 5 years
- Bachelor of Science
- Paid parental leave
- Paid holidays
Sr. RFIC Design Engineer (Silicon Engineering)
SpaceX —Sunnyvale, CA
- $170,000 - $230,000 a year
- Weekends as needed
- Computer Science
- 5 years
- System design
- Paid parental leave
- Employee stock purchase plan
Digital Verification Engineer I
Silicon Labs Careers —Austin, TX
- $84,000 - $156,000 a year
- Full-time
- Hybrid work
- Master's degree
- Analysis skills
- Doctor of Philosophy
- Free parking
- Commuter assistance
Manager, ASIC Design Engineering (Starshield Silicon)
SpaceX —Hawthorne, CA
- $190,000 - $245,000 a year
- Weekends as needed
- Computer Science
- 5 years
- Team management
- Paid parental leave
- Employee stock purchase plan
RFIC Engineer (Starshield Silicon)
SpaceX —Hawthorne, CA
- $125,000 - $175,000 a year
- Weekends as needed
- Computer science
- Computer Science
- Mid-level
- Paid parental leave
- Employee stock purchase plan
Sr. IC Package Design Engineer (Silicon Engineering)
SpaceX —Irvine, CA
- $160,000 - $225,000 a year
- Extended hours
- 5 years
- Senior level
- Electrical Engineering
- Paid parental leave
- Employee stock purchase plan
Principal RFIC Engineer (Starshield Silicon)
SpaceX —Hawthorne, CA
- $200,000 - $285,000 a year
- Weekends as needed
- Computer science
- Computer Science
- Master's degree
- Paid parental leave
- Employee stock purchase plan
ASIC Design Engineer
Blue Origin —Central, TX
- Full-time
- Background check
- Bachelor of Science
- DOT physical examination
- Paid parental leave
- Paid holidays
12d
Microwave Photonics Engineer
S2 Corporation —Bozeman, MT
- Extended hours
- Background check
- Word processing
- Pass drug screening
Sr. Hardware Design Engineer - Electrical, Satellite Payload (Starlink)
SpaceX —Sunnyvale, CA
- $145,000 - $205,000 a year
- Extended hours
- Engineering
- 3 years
- Analysis skills
- Paid parental leave
- Employee stock purchase plan

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Senior FPGA Design Engineer

Three Point Solutions, Inc. -
Rochester, NY

Quick Apply

Job Details

Full-time
$110,000 - $140,000 a year

Benefits

Relocation assistance
Dental insurance
401(k)
Paid time off
Parental leave

Qualifications

Digital signal processing
Embedded systems
FPGA
VHDL
Verilog
Telecommunications systems
Linux
FPGA circuit design
Vivado

Full Job Description

Job Title: Senior FPGA Design & Verification Engineer – VHDL/SystemVerilog
Location: Rochester, NY
Job Type: Full-Time Permanent
Industry: Aerospace / Defense

Overview
Seeking an experienced FPGA Engineer for tactical and radio communication systems. The role involves FPGA design, verification, DSP/modem implementation, and embedded communication system development.

Key Responsibilities

· Design, develop, and verify FPGA firmware using VHDL/Verilog

· Implement DSP, modem, waveform, and signal-processing solutions

· Create SystemVerilog test benches, verification plans, and perform validation/testing

· Integrate FPGA firmware with hardware platforms and support troubleshooting

· Work with cross-functional teams on system architecture, reviews, and technical documentation

Required Skills

· Strong FPGA/ASIC development and verification experience

· Hands-on experience with VHDL, Verilog, and SystemVerilog

· Experience with Vivado, Quartus, Libero, and Linux environments

· Background in DSP, modem implementation, and embedded communication systems

· Ability to obtain US Secret Security Clearance

Preferred Skills

· MATLAB/Simulink, TCL or Python scripting

· UVM, Mentor Questa/Visualizer

· RF/MODEM testing experience

· Experience with GIT, SVN, or Bitbucket

Qualifications

· Bachelor’s + 7 years, Graduate Degree + 9 years, or 13+ years relevant experience

Benefits

· Full benefits, relocation assistance, PTO, holidays, 401(k), insurance, parental leave, and education assistance

Additional Info

· 9/80 Schedule (every other Friday off)

· No travel required

· Visa sponsorship not available

· Clearance sponsorship available
IND_ENG

Pay: $110,000.00 - $140,000.00 per year

Benefits:

401(k)
Dental insurance
Paid time off
Parental leave

Experience:

FPGA development using VHDL/Verilog : 7 years (Required)
DSP & communication systems : 4 years (Required)
FPGA verification : 5 years (Required)

Work Location: In person

Quick Apply

Refine Your Search

modem asic design engineer jobs

Senior FPGA Design Engineer

Senior Specialist, Electrical Engineer - FPGA

Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development

Physical Design Engineer - Multiple Levels

Principal ASIC Design Engineer (Starshield)

Sr. ASIC Design Engineer (Starshield)

RFIC Design Engineer (RFIC Engineering)

Communication Systems Engineer

Sr. RFIC Design Engineer (RFIC Engineering)

Sr. RFIC Engineer

Senior ASIC Design Verification Engineer - Terawave

Sr. RFIC Design Engineer (Silicon Engineering)

Digital Verification Engineer I

Manager, ASIC Design Engineering (Starshield Silicon)

RFIC Engineer (Starshield Silicon)

Sr. IC Package Design Engineer (Silicon Engineering)

Principal RFIC Engineer (Starshield Silicon)

ASIC Design Engineer

Microwave Photonics Engineer

Sr. Hardware Design Engineer - Electrical, Satellite Payload (Starlink)

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