Top 1667 Design verification engineer, tpu cloud compute Jobs in Santa Clara, Ca

Design Verification Engineer, TPU Cloud Compute
Google —Sunnyvale, CA
- $116,000 - $166,000 a year
- Full-time
- Computer science
- Computer Science
- Mid-level
ASIC Design Verification Engineer, TPU Cloud Compute
Google —Sunnyvale, CA
- $138,000 - $198,000 a year
- Full-time
- Computer science
- Computer Science
- Master's degree
ASIC Design Verification Engineer, TPU Cloud
Google —Sunnyvale, CA
- $138,000 - $198,000 a year
- Full-time
- Computer science
- Computer Science
- Master's degree
ASIC Design Verification Engineer, TPU Compute
Google —Sunnyvale, CA
- $138,000 - $198,000 a year
- Full-time
- Computer science
- Computer Science
- Master's degree
Design Verification Engineer
Intel —Santa Clara, CA
- $105,650 - $149,150 a year
- Full-time
- Computer Science
- Bachelor of Science
- Linux
- Health insurance
9h
Hardware Verification Engineer, Entry Level
Synopsys —Sunnyvale, CA
- $90,000 - $136,000 a year
- Contract
- Computer science
- Computer Science
- Master's degree
5d
Design Verification Engineer
Advanced Micro Devices, Inc —Santa Clara, CA
- Hybrid work
- Master's degree
- Analysis skills
- Mentoring
RTL Design Engineer
iTechStack Inc. —Sunnyvale, CA
- $150,000 - $170,000 a year
- Full-time
- Quality control
- In-person
- Senior level
Quick Apply
6d
Lead ASIC DFT Engineer
Cyient —San Jose, CA
- $80 - $85 an hour
- Full-time
- Analysis skills
- Mentoring
- In-person
Quick Apply
Test Supervisor
dB Control —Fremont, CA
- $80,000 - $100,000 a year
- Full-time
- Mid-level
- Analysis skills
- Bachelor's degree
- Health savings account
- Health insurance
Quick Apply
Distinguished Engineer - AI
NetApp —San Jose, CA
- $266,050 - $396,000 a year
- System design
- Databases
- Product management
- Employee stock purchase plan
- Health insurance
Senior Product Security Engineer
Hologic —Santa Clara, CA
- $106,600 - $171,800 a year
- Full-time
- Azure
- Computer Science
- Windows
Principal Electrical Design Engineer
Coherent Corp. —Fremont, CA
- $114,375 - $195,875 a year
- Overtime
- 7 years
- Office
- Master's degree
Emulation and FPGA Prototyping Engineer
GS Microelectronics US Inc. —San Jose, CA
- $150,000 - $250,000 a year
- Full-time
- Computer Science
- 5 years
- Master's degree
- Health insurance
- Dental insurance
Quick Apply
2d
FPGA Design/Verification Engineer
The Structures Company, LLC —Sunnyvale, CA
- $100 an hour
- Contract
- Mid-level
- Mentoring
- Scripting
- Health insurance
- Dental insurance
Quick Apply
6d
Emulation Engineer
Experis —San Jose, CA
- Contract
- Mid-level
- 3 years
- Leadership
- Health savings account
- Disability insurance
Quick Apply
Secret Cleared FPGA Verification Engineer (Job ID 003150)
Innovien Solutions —Sunnyvale, CA
- From $80 an hour
- Full-time
- Analysis skills
- In-person
- Senior level
- Health savings account
- Health insurance
Quick Apply
Principal Design Verification Engineer
Everforth —San Jose, CA
- Full-time
- Data analysis skills
- Doctor of Philosophy
- Fair chance
- Dental insurance
- 401(k)
Quick Apply
9d
DV Engineer
Etech Hi —Milpitas, CA
- Up to $225,000 a year
- Full-time
- Computer Science
- Office
- Master's degree
Quick Apply
Principal Design Verification Engineer - PCIe / High-Speed SoC
Everforth —Santa Clara, CA
- $200,000 - $250,000 a year
- Full-time
- Management
- Analysis skills
- C++
- Employee stock purchase plan
- Paid holidays
1d

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design verification engineer, tpu cloud compute jobs near santa clara, ca

Design Verification Engineer, TPU Cloud Compute

Google -
Sunnyvale, CA

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Job Details

Full-time
$116,000 - $166,000 a year

Qualifications

Verification (System development task)
Verilog

Full Job Description

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
1 year of experience in design verification.
Experience with SystemVerilog/Verilog.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with Universal Verification Methodology (UVM) testbenches and methodologies.
Excellent problem-solving and debugging skills.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As an ASIC Design Verification Engineer, you will be part of a team developing ASICs used to accelerate computation in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design verification, and silicon bring up. You will participate in the architecture, documentation, and verification of the next generation of data center accelerators.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $116000 - $166000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google.

Responsibilities

Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

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design verification engineer, tpu cloud compute jobs in santa clara, ca

Design Verification Engineer, TPU Cloud Compute

ASIC Design Verification Engineer, TPU Cloud Compute

ASIC Design Verification Engineer, TPU Cloud

ASIC Design Verification Engineer, TPU Compute

Design Verification Engineer

Hardware Verification Engineer, Entry Level

Design Verification Engineer

RTL Design Engineer

Lead ASIC DFT Engineer

Test Supervisor

Distinguished Engineer - AI

Senior Product Security Engineer

Principal Electrical Design Engineer

Emulation and FPGA Prototyping Engineer

FPGA Design/Verification Engineer

Emulation Engineer

Secret Cleared FPGA Verification Engineer (Job ID 003150)

Principal Design Verification Engineer

DV Engineer

Principal Design Verification Engineer - PCIe / High-Speed SoC

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