Top 118 Dft design engineer Jobs in Austin, Tx

DFT Design Engineer
Cadence Design Systems —Austin, TX
- Full-time
- Mid-level
- Analysis skills
- 2 years
14d
Design Engineer I
Silicon Labs Careers —Austin, TX
- $78,750 - $146,250 a year
- Full-time
- Hybrid work
- Mid-level
- Master's degree
- Analysis skills
- Free parking
- Commuter assistance
14d
ASIC Design Engineer - Hardware
NVIDIA —Austin, TX
- $116,000 - $218,500 a year
- Full-time
- Hybrid work
- Bachelor of Science
- Mid-level
- Analysis skills
CPU Circuit Design Engineer
Intel —Austin, TX
- $91,150 - $172,860 a year
- Full-time
- Master's degree
- 1 year
- Electrical Engineering
- Health insurance
DFT Engineer
Broadcom —Austin, TX
- $129,400 - $207,000 a year
- Full-time
- 8 years
- Fair chance
- Senior level
- Employee stock purchase plan
- Paid holidays
9d
DFT Design Engineer I, AWS Machine Learning Acceleration
Annapurna Labs (U.S.) Inc. —Austin, TX
- $104,000 - $185,000 a year
- Full-time
- Mid-level
- Electrical Engineering
- Python
Physical Design Engineer - Multiple Levels
Qualcomm —Austin, TX
- $140,000 - $229,800 a year
- Multiple hires
- Engineering
- Mid-level
- Analysis skills
Senior Design Engineer
Arm —Austin, TX
- $161,500 - $218,500 a year
- Email
- Computer science
- 7 years
- Computer Science
- Paid time off
- 401(k) matching
ASIC Clocks Design Engineer - New College Grad 2026
NVIDIA —Austin, TX
- $100,000 - $189,750 a year
- Full-time
- Mid-level
- Electrical Engineering
Physical Design Engineer
OLIX —Austin, TX
- From $305,000 a year
- Full-time
- Office
- Residential
- US work authorization
- Retirement plan
Physical Design Engineer
Cisco Systems —Austin, TX
- $137,000 - $277,600 a year
- Full-time
- Master's degree
- Analysis skills
- Doctor of Philosophy
- Paid parental leave
- Paid holidays
Senior Physical Design and Timing Engineer
NVIDIA —Austin, TX
- $136,000 - $264,500 a year
- Full-time
- Hybrid work
- Bachelor of Science
- 3 years
- Senior level
4d
Senior ASIC Physical Design Engineer, Netlisting
NVIDIA —Austin, TX
- $136,000 - $264,500 a year
- Full-time
- Hybrid work
- Bachelor of Science
- 3 years
- Senior level
CPU Physical Design Engineer
Intel —Austin, TX
- $105,650 - $172,860 a year
- Full-time
- Mid-level
- Analysis skills
- Scripting
- Health insurance
CPU SRAM Design Engineer
Qualcomm —Austin, TX
- $122,500 - $183,700 a year
- Computer Science
- Bachelor of Science
- 3 years
RTL Design Engineer
Apple —Austin, TX
- Bachelor of Science
- Analysis skills
- Bachelor's degree
Field Application Engineer - Tessent Design for Test (DFT)
Siemens —Austin, TX
- $293,400 a year
- Full-time
- Hybrid work
- Master's degree
- 8 years
- Analysis skills
VLSI Design Engineer
Retym —Austin, TX
- Full-time
- 5 years
- Bachelor of Science
- Senior level
DFT Engineer
Retym —Austin, TX
- Full-time
- Master's degree
- Analysis skills
- Senior level
Systems Design Engineer
Advanced Micro Devices, Inc —Austin, TX
- 5 years
- Laboratory experience
- Master's degree

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dft design engineer jobs near austin, tx

DFT Design Engineer

Cadence Design Systems -
Austin, TX

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Job Details

Full-time
14 days ago

Qualifications

Defect resolution root cause analysis
Engineering development testing
Verification (System development task)
Defect analysis
SoC
Digital circuit design
Design engineering
Developing automated testing protocols
Test analysis
Debugging
Failure analysis

Full Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

US citizenship Required

We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation. It is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches.

Requirements;

Prior 2-10 years of professional experience in SoC/ASIC Digital Design with focus on Design for Test (DFT)
Should possess intimate knowledge of DFT insertion flows
Basic scan chain insertion using synthesis or other software tools
Experience in compression scan insertion, LBIST and other scan technologies
Intimate knowledge of memory build-in self-test (MBIST)
Expertise in Automatic Test Pattern Generation (ATPG) to achieve design test coverage goals
Debug and Analysis of failures to improve fault coverage
Verification of ATPG testbenches and debugging root cause of simulation mis-compares
Working knowledge of JTAG 1149.1/6, IEEE1500 and IEEE1687
Knowledge of timing analysis and equivalency checks would be added bonus
US citizenship Required
Ability to work in collaborative team environment
Prior experience with Cadence tools and flows is highly desirable
Should be able to finish DFT tasks independently
Strong problem-solving skills. Exhibit discipline, thoroughness, and methodical approach in solving problems
Ability to work with stakeholders across cross-functional teams – Architecture, Design, Internal and External Customers
Self-driven and committed individual who can work in a fast-paced project environment

We’re doing work that matters. Help us solve what others can’t.

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Refine Your Search

dft design engineer jobs in austin, tx

DFT Design Engineer

Design Engineer I

ASIC Design Engineer - Hardware

CPU Circuit Design Engineer

DFT Engineer

DFT Design Engineer I, AWS Machine Learning Acceleration

Physical Design Engineer - Multiple Levels

Senior Design Engineer

ASIC Clocks Design Engineer - New College Grad 2026

Physical Design Engineer

Physical Design Engineer

Senior Physical Design and Timing Engineer

Senior ASIC Physical Design Engineer, Netlisting

CPU Physical Design Engineer

CPU SRAM Design Engineer

RTL Design Engineer

Field Application Engineer - Tessent Design for Test (DFT)

VLSI Design Engineer

DFT Engineer

Systems Design Engineer

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