Top 748 Design verification engineer Jobs in Cedar Park Tx

CPU Core Design Verification Engineer
Advanced Micro Devices, Inc —Austin, TX
- Hybrid work
- Master's degree
- C++
- Senior level
CPU Design Verification Engineer
Apple —Austin, TX
- Computer science
- Computer Science
- Bachelor of Science
ASIC Design Verification Engineer (Santa Clara, CA)
Qualcomm —Austin, TX
- $126,700 - $190,100 a year
- Engineering
- Mid-level
- 3 years
Verification Engineer - New College Grad 2026
NVIDIA —Austin, TX
- $100,000 - $189,750 a year
- Full-time
- Master's degree
- Analysis skills
- Experience equivalent to degree accepted
1d
SoC Physical Design Verification Engineer
Apple —Austin, TX
- $184,700 - $324,800 a year
- Bachelor of Science
- Bachelor's degree
- Senior level
- Employee stock purchase plan
- Health insurance
Design Verification Engineer
Apple —Austin, TX
- $175,000 - $308,500 a year
- Bachelor of Science
- Bachelor's degree
- Senior level
- Employee stock purchase plan
- Health insurance
Design Verification Engineer (remote position)
Correct Designs —Austin, TX
- Contract
- Mid-level
- 3 years
- Analysis skills
- Retirement plan
Quick Apply
Digital Design Verification Engineer
OLIX —Austin, TX
- $123,000 a year
- Full-time
- 5 years
- Office
- Residential
- Retirement plan
ASIC Design Verification Engineer
Ericsson —Austin, TX
- 8 hour shift
- Hybrid work
- Master's degree
- Linux
- In-person
- Paid parental leave
- AD&D insurance
Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
NVIDIA —Austin, TX
- $136,000 - $264,500 a year
- Full-time
- Computer science
- Computer Science
- 5 years
4d
ASIC Design Verification Engineer
Advanced Micro Devices, Inc —Austin, TX
- Hybrid work
- Computer Science
- Bachelor of Science
- Engineering
ASIC Verification Engineer - New College Grad 2026
NVIDIA —Austin, TX
- $100,000 - $189,750 a year
- Full-time
- Computer science
- Computer Science
- Bachelor of Science
Design Verification Engineer
Cirrus Logic —Austin, TX
- Full-time
- Hybrid work
- Master's degree
- Doctor of Philosophy
- Senior level
Design Verification Engineer -Staff
Qualcomm —Austin, TX
- $154,000 - $231,000 a year
- Computer science
- Computer Science
- Mid-level
Design Verification Engineer
Correct Designs —Austin, TX
- Contract
- Computer Science
- Mid-level
- 3 years
- Retirement plan
Quick Apply
Design & Verification Engineer, Analog Power Management (7682)
TSMC —Austin, TX
- $120,000 - $170,000 a year
- System design
- Research
- Senior level
Silicon Design Engineer
Advanced Micro Devices, Inc —Austin, TX
- Online Application
- Research
- Travel
- Electrical Engineering
3d
Senior Design Verification Engineer (remote position)
Correct Designs —Austin, TX
- Contract
- 8 years
- Analysis skills
- In-person
- Retirement plan
Quick Apply
SoC Verification Engineer
Intel —Austin, TX
- $141,910 - $200,340 a year
- Full-time
- Hybrid work
- Computer Science
- Mid-level
- 3 years
- Health insurance
Formal Design Verification Engineer
Advanced Micro Devices, Inc —Austin, TX
- Hybrid work
- Mid-level
- Master's degree
- Analysis skills

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CPU Core Design Verification Engineer

Advanced Micro Devices, Inc -
Austin, TX

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Job Details

Qualifications

System architecture

Full Job Description

Overview:

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

Responsibilities:

THE ROLE:

As a CPU Core Design Verification Engineer, you will verify new and existing microarchitectural features in AMD's next-generation x86 CPU cores. Working within a C++ and Verilog/SystemVerilog-based environment, you will independently own a portion of the unit- or core-level verification effort — developing tests, checkers, and coverage and driving them to a quality result with limited supervision.

You will collaborate with RTL designers, architects, and fellow verification engineers, both within the verification team and across departments, to ensure microarchitectural intent is correctly implemented and validated. Success requires solid computer architecture fundamentals, the ability to analyze and evaluate microarchitectural behavior using standard verification methods, and a self-motivated approach to owning the quality and timeliness of your work.

THE PERSON:

You have a strong interest in computer architecture and processor microarchitecture and enjoy working at the intersection of hardware and software. You are a self-motivated problem solver who takes responsibility for the quality and timeliness of your portion of the project, planning your work over a horizon of weeks to months.

You value clean, scalable verification environments and apply sound testbench and agent principles in your work. You make technical decisions independently within your area, put checks and balances in place to catch issues early, communicate clearly, and collaborate effectively across teams and time zones.

KEY RESPONSIBILITIES:

Collaborate with RTL designers, architects, and verification engineers to understand microarchitectural features, corner cases, and verification requirements
Own the test plan, stimulus, checking, and functional coverage for an assigned portion of unit- or core-level verification
Design, implement, and maintain C++-based and SystemVerilog-based testbench components, applying modular, reusable verification agent patterns
Write and maintain SystemVerilog assertions and functional coverage models
Debug simulation failures, independently drive root-cause analysis, and work cross-functionally to resolve RTL or testbench issues
Drive functional and code coverage closure for your area, identify verification gaps, and improve stimulus and checking as needed
Apply AI-assisted and agent-based development tools to improve verification productivity

PREFERRED EXPERIENCE:

Good understanding of computer architecture
Experience using C++ and SystemVerilog to develop verification infrastructure for complex hardware designs
Working knowledge of Digital Logic Design and RTL design concepts using Verilog
Familiarity with constrained-random testing and coverage-driven verification
Understanding of assembly-level programming and instruction execution at the ISA level
Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics
Scripting knowledge (Python, Perl) is a plus

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION: Austin, TX

This role is not eligible for visa sponsorship.

#LI-MF2

#LI-Hybrid

Qualifications:

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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Refine Your Search

design verification engineer jobs in cedar park tx

CPU Core Design Verification Engineer

CPU Design Verification Engineer

ASIC Design Verification Engineer (Santa Clara, CA)

Verification Engineer - New College Grad 2026

SoC Physical Design Verification Engineer

Design Verification Engineer

Design Verification Engineer (remote position)

Digital Design Verification Engineer

ASIC Design Verification Engineer

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

ASIC Design Verification Engineer

ASIC Verification Engineer - New College Grad 2026

Design Verification Engineer

Design Verification Engineer -Staff

Design Verification Engineer

Design & Verification Engineer, Analog Power Management (7682)

Silicon Design Engineer

Senior Design Verification Engineer (remote position)

SoC Verification Engineer

Formal Design Verification Engineer

I want to receive the latest job alert for design verification engineer in cedar park tx

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