Top 713 Design verification engineer Jobs in Del Valle, Tx

Silicon Design Verification Engineer
Advanced Micro Devices, Inc —Austin, TX
- Hybrid work
- Mid-level
- Master's degree
- Analysis skills
Design Verification Engineer
Apple —Austin, TX
- $175,000 - $308,500 a year
- Bachelor of Science
- Bachelor's degree
- Senior level
- Employee stock purchase plan
- Health insurance
CPU Core Design Verification Engineer
Advanced Micro Devices, Inc —Austin, TX
- Hybrid work
- Master's degree
- C++
- Senior level
3d
ASIC Design Verification Engineer
Advanced Micro Devices, Inc —Austin, TX
- Hybrid work
- Computer Science
- Bachelor of Science
- Engineering
CPU Design Verification Engineer
Apple —Austin, TX
- Computer science
- Computer Science
- Bachelor of Science
Design Verification Engineer (remote position)
Correct Designs —Austin, TX
- Contract
- Mid-level
- 3 years
- Analysis skills
- Retirement plan
Quick Apply
Formal Design Verification Engineer
Advanced Micro Devices, Inc —Austin, TX
- Hybrid work
- Mid-level
- Master's degree
- Analysis skills
ASIC Engineer, Design Verification
Meta —Austin, TX
- $114,000 - $172,000 a year
- Computer science
- Computer Science
- Mid-level
Digital Design Verification Engineer
OLIX —Austin, TX
- $123,000 a year
- Full-time
- 5 years
- Office
- Residential
- Retirement plan
MLA Design Verification Engineer I, Annapurna Labs
Amazon.com Services LLC —Austin, TX
- $109,700 - $160,000 a year
- Full-time
- Software development
- 1 year
- Electrical Engineering
- AD&D insurance
- Health insurance
Fall 2026 Co-Op - Design Verification Engineer
Cirrus Logic —Austin, TX
- Hybrid work
- Office
- Electrical Engineering
- Internship
Design Verification Engineer
Cirrus Logic —Austin, TX
- Full-time
- Hybrid work
- Master's degree
- Doctor of Philosophy
- Senior level
ASIC Verification Engineer - New College Grad 2026
NVIDIA —Austin, TX
- $100,000 - $189,750 a year
- Full-time
- Computer science
- Computer Science
- Bachelor of Science
SoC Physical Design Verification Engineer
Apple —Austin, TX
- $184,700 - $324,800 a year
- Bachelor of Science
- Bachelor's degree
- Senior level
- Employee stock purchase plan
- Health insurance
Senior CPU Design Verification Engineer
Intel —Austin, TX
- $122,440 - $232,190 a year
- Full-time
- Hybrid work
- Master's degree
- Senior level
- Electrical Engineering
- Health insurance
Sr. Modem Design Verification Engineer
Silicon Labs Careers —Austin, TX
- $124,600 - $231,400 a year
- Full-time
- 5 years
- Continuous improvement
- Senior level
- Free parking
- Commuter assistance
Design Verification Engineer
Amazon Kuiper Manufacturing Enterprises LLC —Austin, TX
- $109,700 - $170,000 a year
- Full-time
- Computer science
- Computer Science
- System design
- AD&D insurance
- Health insurance
4d
Design Verification Engineer
Verilab —Lakeway, TX
- Full-time
- Computer science
- 7 years
- Computer Science
- AD&D insurance
- Paid holidays
Quick Apply
SoC Verification Engineer
Intel —Austin, TX
- $141,910 - $200,340 a year
- Full-time
- Hybrid work
- Computer Science
- Mid-level
- 3 years
- Health insurance
11d
Senior Design Verification Engineer (remote position)
Correct Designs —Austin, TX
- Contract
- 8 years
- Analysis skills
- In-person
- Retirement plan
Quick Apply

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Silicon Design Verification Engineer

Advanced Micro Devices, Inc -
Austin, TX

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Job Details

Qualifications

Regression testing implementation
Bachelor's degree in electrical engineering
Verification (System development task)
FPGA
Electronics test plan development
System architecture
Mid-level
Master's degree
Verilog
Analysis skills
SoC
Computer Engineering
Master's degree in electrical engineering
Simulation tools
Engineering functional testing
Test analysis
Master's degree in computer engineering
Electrical Engineering
Communication skills
Debugging
Test Planning (Quality assurance practices)

Full Job Description

Overview:

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

Responsibilities:

THE ROLE:

We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Plan verification of complex digital design blocks by fully understanding the architecture and design specifications
Interact with architects and design engineers to create a comprehensive verification test plan
Design testbenches in System Verilog and UVM to complete verification of the design in an efficient manner
Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools
Debug tests with design engineers to deliver functionally correct design blocks
Identify and write coverage measures for stimulus quality improvements
Perform coverage analysis to identify verification holes and achieve closure on coverage metrics

PREFERRED EXPERIENCE:

Experienced with development of UVM, OVM, VMM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs.
Strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification.
Strong understanding of different phases of ASIC and/or full custom chip development is required.
Experience in block level NOC (Net work on Chip) verification is a plus.
Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus.
Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high performance FPGAs, SOCs and/or VLSI designs is a plus.
Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus.
Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus.
Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus.

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in Computer Engineering/Electrical Engineering

LOCATION: San Jose, CA, OR San Diego, CA OR Austin, TX OR Longmont, CO

#LI-EV1

#LI-HYBRID

This role is not eligible for visa sponsorship.

Qualifications:

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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Refine Your Search

design verification engineer jobs in del valle, tx

Silicon Design Verification Engineer

Design Verification Engineer

CPU Core Design Verification Engineer

ASIC Design Verification Engineer

CPU Design Verification Engineer

Design Verification Engineer (remote position)

Formal Design Verification Engineer

ASIC Engineer, Design Verification

Digital Design Verification Engineer

MLA Design Verification Engineer I, Annapurna Labs

Fall 2026 Co-Op - Design Verification Engineer

Design Verification Engineer

ASIC Verification Engineer - New College Grad 2026

SoC Physical Design Verification Engineer

Senior CPU Design Verification Engineer

Sr. Modem Design Verification Engineer

Design Verification Engineer

Design Verification Engineer

SoC Verification Engineer

Senior Design Verification Engineer (remote position)

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